Shi-Xuan Huang — DevOps Engineer
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Verification and Timing Analysis.
Experience: 3 yrs 11 mos
Skills
- Verilog
- Physical Verification
- Cadence
- Static Timing Analysis
Career Highlights
- Experienced in Physical Verification and Static Timing Analysis.
- Proficient in Verilog and Cadence tools.
- Strong background in semiconductor design methodologies.
Work Experience
新思科技
Research Development senior Engineer (3 yrs 11 mos)
Taiwan Semiconductor Research Institute (TSRI), 台灣半導體研究中心
計畫助理 (1 yr 4 mos)
Education
碩士 at National Chung Cheng University
