Varshith Govindula — Product Engineer
💻 Physical Design Engineer @ Intel With a foundation shaped by hands-on training and now grounded in real industry experience, I work at the intersection of digital logic and silicon — where design meets tapeout. I gained hands-on experience in core backend flows — from Floorplanning and Placement to CTS, STA ⏱️, and Timing Closure — at RV-Skills Design Center, using Synopsys IC Compiler II and PrimeTime. Now at Intel, I contribute to the physical implementation of large-scale SoCs using Synopsys Fusion Compiler , building on what I’ve learned and adapting to industry workflows with precision and intent. I’m driven by the challenge of solving complex design problems and the satisfaction that comes with achieving clean layouts and tight timing closure 🎯
Stackforce AI infers this person is a Semiconductor Design Engineer specializing in physical design and SoC implementation.
Experience: 1 yr 3 mos
Skills
- Physical Design
- System On A Chip (soc)
- Static Timing Analysis
Career Highlights
- Expert in physical design implementation flows.
- Hands-on experience with advanced SoC environments.
- Proficient in timing closure and layout optimization.
Work Experience
Intel Corporation
Physical Design Engineer (1 yr 3 mos)
RV Skills Design Centre
ASIC Physical Design Engineer (6 mos)
Education
Bachelor of Technology - BTech at Vardhaman College of Engineering (VCEH)
