Dec 2019 – Present · 6 yrs 6 mos · Noida, Uttar Pradesh, India · On-site

• Responsible for building and scaling RTL Restructuring, RTL editing & feedthrough insertion flow inside RTLA. Leading geographically dispersed team of 12 young engineers, Owning 3 different product areas. Enabling multiple innovations by providing platform for RTL generation capability which is helping in faster design closures as lengthy iterations get reduced at RTL level. Solving many high value problems and working in different product areas leading to faster design turnaround. We developed & delivered multiple core flows/features which are used by many customers in production flows.
• Automatic alteration of design hierarchies in RTL for better PPA(Power, Performance and Area).
• end-2-end flow for LEC post RTL restructuring
• built unique solution for functional safety Dual-Core-Lock-Step(DCLS) at RTL
• built solution for isolation logic insertion at RTL
• Developed industry first solution of automatic restructuring of Verilog configurations to keep them sync with restructured RTL
• Developed many key features of port optimizations and bus-splitting at RTL leading to physical area improvement

Aug 2015 – Dec 2019 · 4 yrs 4 mos · Noida, Uttar Pradesh, India · On-site

• Actively participated in the technology overlap, gap analysis between Synopsys and Atrenta products for building new flows/products.
• Technically lead high performing team of 5-7 members
• managed/contributed/lead following products
• 1)RTLA Product (Simply Better RTL)
• The Synopsys RTL Architect product represents the industry’s first physically-aware RTL analysis, exploration, and optimization system with signoff technology integration.
• Architected and built flow from scratch for bringing much needed differentiation of PPA aware RTL restructuring solution for making design closure. Complete technology integration was single handedly done by me including the product packaging/release and flow validations etc.
• Built the flow for RTL editing and physical aware feed-through insertion flow in RTL.
• 2)TestMAX Manager(Comprehensive RTL Integration Environment for Design-For-Test (DFT))
• Synopsys TestMAX Manager extends DFT automation to the RTL implementation phase to provide a comprehensive RTL integration flow while extending into the system and field-testing domain. TestMAX Manager provides a Tcl based framework for the interoperability of the Synopsys TestMAX family of products, enabling flow automation and customization along with design introspection and editing capability.
• Architected and built product flow from scratch for this product for DFT IP insertion, hookup and DFT inserted RTL generation and validation.
• Architected and built product flow from scratch for this product for pre-post DFT RTL modifications and validation.
• 3) GenSys Product (RTL Restructuring and Design Assembly)
• Synopsys GenSys product provides an environment to enable “correct-by-construction” RTL design assembly and includes management and modification tools for RTL restructuring that enables improved productivity for front-end designers.
• Supported standalone customers and releases
• Integrated core technologies from GenSys into RTLA & TestMAX Managers to bring unique differentiation