Esteban Viveros Silva

CEO

Chillán, Ñuble Region, Chile21 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Led a team of 20 in product validation at Synopsys.
  • Achieved maximum distinction in Electronic Engineering.
  • Expert in quality assurance and project management.
Stackforce AI infers this person is a Software Development expert with a focus on Electronic Design Automation.

Contact

LinkedIn

Skills

Core Skills

Quality AssuranceProject Management

Other Skills

Regression testingEnglishTeam leadershipAnalytical skillsProblem solvingSoftware developmentTeamworkProduct validationSoftware quality assuranceSoftware testingMicrosoft OutlookIntegrated circuitsAlgorithmsFPGAMicrocontrollers

About

Electronic Engineer from the University of Concepción - Chile. Approved with Maximum Distinction, specialized in the area of Digital Systems. Ingeniero Civil Electrónico y Licenciado en Ciencias de la Ingeniería de la Universidad de Concepción - Chile. Aprobado con Distinción Máxima, especializado en el área de Sistemas Digitales.

Experience

21 yrs 7 mos
Total Experience
10 yrs 9 mos
Average Tenure
12 yrs 1 mo
Current Experience

Synopsys inc

6 roles

Validation / Verification Manager

Promoted

Feb 2023 – Present · 3 yrs 4 mos · Chile

  • Manager of the PV team in Chile (10 direct + 10 indirect reports). The team is part of "Electronic Design Automation Group" (EDAG), specifically on "Platform Operations and Validation" (POV) team.
  • The team works on the "Product Validation" of the Synopsys tools from "Digital Design Family" used for RTL Synthesis, Test, Physical Implementation (Place and Route), Formal Verification and Sign-off. We are responsible of the quality of the tools and we focus on the stability, performance, usability and QoR (Quality of Results). The team interacts daily with colleagues and internal/external customers in different parts of the world (mainly US, China, India, Taiwan).
  • The tools we mainly work on are: Design Compiler, Fusion Compiler, IC Compiler II, Formality and NanoTime.-
Regression testingEnglishTeam leadershipAnalytical skillsProblem solvingSoftware development+6

R&D Manager

Jun 2019 – Jan 2023 · 3 yrs 7 mos · Chile

  • Manager of Chile PV team.-

R&D Supervisor II

Promoted

Jul 2017 – May 2019 · 1 yr 10 mos · Chile

  • Manager of Chile PV team.-

Quality Engineer Senior

Dec 2016 – Jun 2017 · 6 mos · Chile

  • Member of Chile PV team.-

Quality Engineer II

Promoted

Jul 2015 – Nov 2016 · 1 yr 4 mos · Chile

  • Member of Chile PV team.-

Quality Engineer

Dec 2013 – Jun 2015 · 1 yr 6 mos · Chile

  • Founder and member of Chile PV team.-

Universidad técnica federico santa maría

Supervisor y examinador "SIMCE TIC"

Sep 2013 – Nov 2013 · 2 mos · Región del Bío-Bío, Chile

Independiente

2 roles

Ingeniero de Desarrollo Hardware

May 2013 – Nov 2013 · 6 mos · Concepción, Chile

Soporte de Computadores (Software y Hardware)

Jan 2004 – Jan 2013 · 9 yrs · Concepción, Chile

Education

Universidad de Concepción

Ingeniería Civil Electrónica — Sistemas Digitales

Jan 2004 – Jan 2012

Universidad de Concepción

Licenciatura en Ciencias de la Ingeniería — Ingeniería Civil Electrónica

Jan 2004 – Jan 2010

Colegio Seminario Padre Alberto Hurtado, Chillán

Educación Básica y Media — Matemático

Jan 1999 – Jan 2003

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