SHIVAM MITTAL

Software Engineer

Noida, Uttar Pradesh, India14 yrs 8 mos experience

Key Highlights

Proven leadership in managing technical teams.
Expertise in customer service and communication.
Strong background in verification methodologies.

Stackforce AI infers this person is a Senior Engineer in the Semiconductor industry with a focus on Verification and Customer Solutions.

Contact

Skills

Core Skills

LeadershipCustomer ServiceCommunicationPresentation SkillsDebuggingLinux

Other Skills

Technical PresentationsPresentationsProduct RequirementsProduct DemonstrationCustomer RequirementsUniversal Verification Methodology (UVM)MarketingVerilog codingCadence INCISIV packagePhysical VerificationTCLSystemVerilogFunctional VerificationVerilogNCSim

About

Eager to learn, Good at commitment. OBJECTIVE: To grow up in this challenging industry, and work to contribute my part towards success of my organization. expecting mutual benefits.

Experience

14 yrs 8 mos

Total Experience

Average Tenure

Current Experience

Renesas electronics

Senior Staff Engineer

Sep 2024 – Present · 1 yr 9 mos · Noida, Uttar Pradesh, India

Cadence design systems

5 roles

Principal Sales AE

Promoted

Jul 2022 – Sep 2024 · 2 yrs 2 mos

Core job includes close partnership with existing customer and new logos, to understand/address their pain points and proliferate our current verification solutions and find new opportunities.
Manage a team and plan their bandwidth at various key customers, owning activities myself too.

LeadershipCommunicationCustomer ServicePresentation SkillsTechnical PresentationsPresentations+7

Lead Sales AE

Jul 2018 – Jun 2022 · 3 yrs 11 mos

CommunicationPresentation SkillsTechnical PresentationsPresentationsProduct RequirementsProduct Demonstration+1

Lead Application Engineer

Jul 2017 – Jun 2018 · 11 mos

Sr. Application Engineer

Jul 2014 – Jun 2017 · 2 yrs 11 mos

Systems & Functional Verification group

APPLICATION ENGINEER

Aug 2012 – Jun 2014 · 1 yr 10 mos

Systems & Functional Verification group

Cadence design system

CONSULTANT

Jan 2012 – Jul 2012 · 6 mos

Working as Application Engineer for Digital Verification team.
Supporting customers on debugging design issues.
Working experience on latest Cadence INCISIV package.
Understanding on various files like SDF, CPF etc.
Working experience on Linux platform .
Exposure of verilog coding used for preparing testcase.
Created solution for cadence online support.

DebuggingLinuxVerilog codingCadence INCISIV package

Cadence design systems

Intern

Apr 2011 – Dec 2011 · 8 mos · Noida, Uttar Pradesh, India

Started with undestanding of complete VLSI flow, then got training on Cadence's INCISIV package dedicatedly for 3 months and finally supported Cadence's global clients.