Ashutosh Yadav — Software Engineer
VLSI Design Engineer with 3+ years of experience in Standard Cell Circuit Design (Foundation IP). Expertise in advanced FinFET technologies including 2nm, 3nm, 4nm, and latest process nodes. Proficient in designing combinational (inverters, adders, multiplexers) and sequential cells (flops, synchronizers). Strong focus on PPA optimization, sigma and hold margin analysis, and layout parasitic reduction. Hands-on experience with EDA tools like Custom Compiler, Cadence Virtuoso, Sentaurus TCAD, HSPICE, and NgSpice. Skilled in Perl and Shell scripting to automate and enhance circuit design workflows.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in semiconductor technologies and circuit design.
Location: Bengaluru, Karnataka, India
Experience: 3 yrs 11 mos
Career Highlights
- Expert in advanced FinFET technologies and process nodes.
- Proficient in PPA optimization and layout parasitic reduction.
- Hands-on experience with leading EDA tools.
Work Experience
Synopsys Inc
Analog Design Staff Engineer (1 yr 4 mos)
Senior Analog Design Engineer (11 mos)
A&MS Cricuit Design Engineer II (1 yr 8 mos)
Education
Bachelor of Technology - BTech at National Institute of Technology Raipur
M.Tech at Visvesvaraya National Institute of Technology