Ashutosh Yadav

Software Engineer

Bengaluru, Karnataka, India3 yrs 11 mos experience
Highly Stable

Key Highlights

  • Expert in advanced FinFET technologies and process nodes.
  • Proficient in PPA optimization and layout parasitic reduction.
  • Hands-on experience with leading EDA tools.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in semiconductor technologies and circuit design.

Contact

Skills

Other Skills

Static Timing AnalysisAnalog Circuit DesignShell ScriptingCMOSDigital Circuit DesignFusion compilerCustom compilerLinuxVerilogLayout Versus Schematic (LVS)Universal Verification Methodology (UVM)Cadence Virtuoso Layout EditorCadence VirtuosoNgSpiceSynopsys TCAD

About

VLSI Design Engineer with 3+ years of experience in Standard Cell Circuit Design (Foundation IP). Expertise in advanced FinFET technologies including 2nm, 3nm, 4nm, and latest process nodes. Proficient in designing combinational (inverters, adders, multiplexers) and sequential cells (flops, synchronizers). Strong focus on PPA optimization, sigma and hold margin analysis, and layout parasitic reduction. Hands-on experience with EDA tools like Custom Compiler, Cadence Virtuoso, Sentaurus TCAD, HSPICE, and NgSpice. Skilled in Perl and Shell scripting to automate and enhance circuit design workflows.

Experience

3 yrs 11 mos
Total Experience
3 yrs 11 mos
Average Tenure
3 yrs 11 mos
Current Experience

Synopsys inc

3 roles

Analog Design Staff Engineer

Feb 2025Present · 1 yr 4 mos · Bengaluru, Karnataka, India

Senior Analog Design Engineer

Promoted

Feb 2024Jan 2025 · 11 mos · Bengaluru, Karnataka, India

A&MS Cricuit Design Engineer II

Jun 2022Feb 2024 · 1 yr 8 mos · Bengaluru, Karnataka, India

Education

National Institute of Technology Raipur

Bachelor of Technology - BTech — Electronics and Telecommunication Engineering

Jan 2015Jan 2019

Visvesvaraya National Institute of Technology

M.Tech — VLSI Design

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