Devendra M.

Software Engineer

Sultanpur, Uttar Pradesh, India7 yrs 9 mos experience

Most Likely To Switch

Key Highlights

Expert in Silicon debug and characterization.
Strong experience in analog IP validation.
Proficient in test automation and planning.

Stackforce AI infers this person is a skilled engineer in semiconductor validation and characterization.

Contact

devendramishra7033@gmail.com LinkedIn

Skills

Core Skills

Silicon DebugAnalog Circuit DesignPost Silicon ValidationValidationCharacterization

Other Skills

VerilogUnixBoard Bring-upBERToscilloscopesfunction generatorsmultimetersource metersSignal source analyzerexternal suppliesMIPIAnalog IPsPLLUSB2.0Test plans

About

1-Actively looking for opportunity where i can use my skill and knowledge which would help the organization to grow and further enhance my profile

Experience

7 yrs 9 mos

Total Experience

1 yr 11 mos

Average Tenure

2 yrs 4 mos

Current Experience

Synopsys inc

2 roles

Staff Engineer

Promoted

Feb 2024 – Present · 2 yrs 4 mos · Hyderabad, Telangana, India · Hybrid

Ownership and Leadership of Characterization of PCIE1-6(Tx &Rx).
2. Understanding the requirement and suggesting the platform/ board team for suitable characterizations board.
3. Strong fundamentals in Silicon debug.
4. Expertise in BERT,oscilloscopes, function generators, multimeter, source meters, Signal source analyzer, external suppliesetc

VerilogUnixAnalog Circuit DesignBoard Bring-upSilicon debugBERT+6

Senior Validation Engineer

Dec 2023 – Feb 2024 · 2 mos · Hyderabad, Telangana, India · Hybrid

Qualcomm

Senior Engineer

May 2022 – Dec 2023 · 1 yr 7 mos · Bengaluru, Karnataka, India · On-site

Post silicon validation ( MIPI)

Post silicon validationMIPI

Nxp semiconductors

Senior Validation Engineer

Apr 2021 – May 2022 · 1 yr 1 mo · India · On-site

Ownership of Validation and Characterization of various analog IPs on the test chip.
2. Strong exposure to Characterization of PLL.

ValidationCharacterizationAnalog IPsPLL

Soctronics

Post silicon Characterization engineer 1

Jul 2018 – Apr 2021 · 2 yrs 9 mos · Greater Hyderabad Area · On-site

Ownership of Validation and Characterization of various analog IPs on the test chip.
2. Strong exposure to Characterization of PLLs, USB2.0( currently working)
3. Understanding the requirement and suggesting the platform/ board team for suitable characterizations board.
4. Finalizing the test plans and test methodologies with the design team and partner foundry.
5. Successful compilation of results in excel across PVT for better data analysis and reduced manual effort.
6. Successful data collection and silicon report generation.
7. Strong fundamentals in Silicon debug, understanding the IP features and required methodology.
8. Expertise in oscilloscopes, function generators, multimeter, source meters, Signal source analyzer, external supplies and their automation using python and Keysight command expert