Deryck Joseph Chacko

Product Engineer

Bhubaneswar, Odisha, India1 yr 5 mos experience

Key Highlights

  • Expert in Analog Layout and Design Engineering.
  • Proficient in using Synopsys and Cadence tools.
  • Strong foundation in VLSI and semiconductor technologies.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Analog Layout and VLSI.

Contact

LinkedIn

Skills

Core Skills

Analog LayoutDesign EngineeringR&d Engineering

Other Skills

Design Rule Checking (DRC)Synopsys toolsSynopsys Design CompilerTransistorsAnalog SemiconductorsMathchingShieldingGuardingdifferential routingArduino IDEUnixPython (Programming Language)AutomotiveElectronic CircuitsSystem on a Chip (SoC)

About

An Analog Layout engineer ,Committed to excellence and innovation in the semiconductor industry. Eager to collaborate and explore new opportunities. Let's connect!

Experience

1 yr 5 mos
Total Experience
1 yr 5 mos
Average Tenure
1 yr 5 mos
Current Experience

Synopsys inc

2 roles

Layout Design Engineer

Jan 2025 – Present · 1 yr 5 mos · Bhubaneswar, Odisha, India · On-site

  • Layout design of mid sized AMS IPs
Design Rule Checking (DRC)Analog LayoutDesign Engineering

Technical Intern

Mar 2024 – Jan 2025 · 10 mos · Bhubaneswar, Odisha, India · On-site

  • Analog Layout Engineer | R&D Engineering
Synopsys toolsSynopsys Design CompilerAnalog LayoutR&D Engineering

Eklakshya innovation labs

Trainee

Jul 2023 – Nov 2023 · 4 mos · Hubli, Karnataka, India · On-site

TransistorsAnalog Semiconductors

Education

eklakshya Innovations lab

VLSI Layout design

Aug 2023 – Nov 2023

Amal Jyothi College of Engineering Autonomous

Bachelor of Technology - BTech — Electronics and Communication Engineering

Jul 2019 – Jul 2023

Saint Berchmans Higher Secondary School Changanacherry

Higher Secondary Computer Science — Higher Education/Higher Education Administration

Jun 2017 – May 2019

Sacred Heart ICSE School Changanacherry

High School

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