chandan kumar

CEO

Bengaluru, Karnataka, India6 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in formal verification methodologies.
  • Proficient in multiple hardware description languages.
  • Strong foundation in VLSI design and applications.
Stackforce AI infers this person is a Formal Verification Engineer with expertise in VLSI and hardware design.

Contact

LinkedIn

Skills

Other Skills

CVerilog-HDLMatlabPSpiceXilinx VivadoCadence VirtuosoShell ScriptingVHDLVC-Formal

Experience

6 yrs 7 mos
Total Experience
2 yrs 2 mos
Average Tenure
2 yrs 5 mos
Current Experience

Cadence design systems

Lead Application Engineer

Jan 2024 – Present · 2 yrs 5 mos · Bengaluru, Karnataka, India

Synopsys inc

2 roles

Formal Verification Engineer

Nov 2020 – Jan 2024 · 3 yrs 2 mos

Formal Verification Intern

Aug 2019 – Nov 2020 · 1 yr 3 mos

Student at amrita vishwa vidhyapeetham,bangalore

Student

Aug 2018 – Aug 2019 · 1 yr · India

Education

Amrita Vishwa Vidyapeetham

Master's degree — VLSI

Jan 2018 – Jan 2020

IIIT Bangalore

Master’s Degree — Information Technology

Jan 2014 – Jan 2016

SCSVMV UNIVERSITY,KANCHIPURAM

Bachelor’s Degree

Jan 2009 – Jan 2013

Stackforce found 100+ more professionals with C & Verilog-HDL

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