Arman Chandra

Product Engineer

Hyderabad, Telangana, India5 yrs 4 mos experience

Key Highlights

Expert in Analog Circuit Design and Verification Engineering.
Proven track record in design optimization for advanced technology nodes.
Strong mentoring experience in engineering methodologies.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Analog Circuit Design and Verification.

Contact

arman.chandra.achandra@gmail.com LinkedIn

Skills

Core Skills

Verification EngineeringAnalog Circuit DesignDesign Optimization

Other Skills

MEMORY PHYVerilogVery-Large-Scale Integration (VLSI)Problem SolvingSimulation and verification flowsAutomation scriptsCadence Virtuoso XLD2D PHYCadence Virtuoso Layout EditorLeadershipPerlMATLABCadence VirtuosoLTSpiceMicrosoft Excel

Experience

5 yrs 4 mos

Total Experience

1 yr 6 mos

Average Tenure

10 mos

Current Experience

Micron technology

Sr. Verification Engineer

Aug 2025 – Present · 10 mos · Hyderabad, Telangana, India · On-site

Verification Engineer for HBM.

MEMORY PHYAnalog Circuit DesignVerilogVery-Large-Scale Integration (VLSI)Problem SolvingVerification Engineering

Synopsys inc

A&MS Circuit Design Sr. Engineer

Dec 2022 – Aug 2025 · 2 yrs 8 mos · Bengaluru, Karnataka, India · On-site

Contributed to the design optimization of complex Local Calibrated Delay Line (DLL) architectures for DDR/LPDDR/HBM PHY interface IPs across advanced 5nm, 3nm, and 1.8nm technology nodes.
Experienced in simulation and verification flows including EM/IR analysis, aging reliability, equivalency checks, and Monte Carlo variation analysis.
Developed automation scripts to efficiently process large-scale simulation data, improving workflow efficiency and reducing Turnaround Time (TAT) by approximately 15–20%.
Possess working knowledge of analog and mixed-signal layout design.
Hands-on experience across multiple projects using Cadence Virtuoso XL.
Mentored interns and new team members on design methodologies, simulation flows, and EDA tool usage.

MEMORY PHYAnalog Circuit DesignSimulation and verification flowsAutomation scriptsCadence Virtuoso XLDesign Optimization

Centre for development of advanced computing (c-dac)

Knowledge Associate

Aug 2022 – Nov 2022 · 3 mos

Si-hive technologies private limited

Analog Circuit Design Intern

Aug 2021 – Jun 2022 · 10 mos · Bangalore Urban, Karnataka, India

Intern in SerDes team for D2D PHY

Analog Circuit DesignD2D PHY

Afcons infrastructure limited - a shapoorji pallonji group company

Electrical Engineer

Jun 2016 – Jan 2018 · 1 yr 7 mos · Mumbai, Maharashtra, India · On-site

Electrical Engineer with experience in handling DG Sets, Batching Plants, Hot Mix plants, HV transformers(upto 11KVA), Electrification of main carriageway,toll plaza and way side amenities