Meghana Nomula — Software Engineer
Working in VLSI/EDA domain supporting Synopsys tools Practical exposure to Physical design tools like Fusion compiler, Synopsys ICC2, Cadence innovus, and Cadence genus. Roles and responsibilities : Knowledge of RTL2GDS flow and methodology. Knowledge of Synthesis and Place & Route engines Solid knowledge of IC physical design flow, device physics, VLSI, and UNIX. Proactive and have a strategic mindset in addition to having tactical problem-solving experience. Working closely with the customer account team by actively participating and influencing the technical strategy and execution for the customer Work with R&D to improve the design flow, QoR, and runtime of the design. Perform multiple what-if analyses using models to determine QoR sweet spot and present results. Perform support process including diagnosing, troubleshooting, and providing workarounds for product bugs, and providing solutions for a wide range of complex issues covering usage, methodology, product defects, and interoperability. Perform block-level place and route and close the design to meet timing, area, and power constraints.
Stackforce AI infers this person is a VLSI design engineer with expertise in physical design and EDA tools.
Experience: 3 yrs 11 mos
Skills
- Physical Design
- Vlsi
Career Highlights
- Expertise in VLSI physical design tools and methodologies.
- Proven ability to diagnose and troubleshoot complex product issues.
- Strong strategic mindset with customer-focused technical execution.
Work Experience
Synopsys Inc
Senior Application Engineer (2 yrs 4 mos)
Application Engineer II (1 yr 7 mos)
GlobalFoundries
Intern (1 yr)
Education
Master of Technology - MTech at University of Hyderabad
Bachelor of Technology - BTech at Geethanjali College of Engineering and Technology
MPC at Sri Chaitanya college Hyderabad
at Oxford model High school