Meghana Nomula

Software Engineer

India3 yrs 11 mos experience
Highly Stable

Key Highlights

  • Expertise in VLSI physical design tools and methodologies.
  • Proven ability to diagnose and troubleshoot complex product issues.
  • Strong strategic mindset with customer-focused technical execution.
Stackforce AI infers this person is a VLSI design engineer with expertise in physical design and EDA tools.

Contact

Skills

Core Skills

Physical DesignVlsi

Other Skills

PythonTCLStatic Timing AnalysisFusion compilerPPAInnovusCadence genusSynopsys Design CompilerSynopsys IC CompilerCCadence VirtuosoXilinx VivadoHTMLRed Hat LinuxModelSim

About

Working in VLSI/EDA domain supporting Synopsys tools Practical exposure to Physical design tools like Fusion compiler, Synopsys ICC2, Cadence innovus, and Cadence genus. Roles and responsibilities : Knowledge of RTL2GDS flow and methodology. Knowledge of Synthesis and Place & Route engines Solid knowledge of IC physical design flow, device physics, VLSI, and UNIX. Proactive and have a strategic mindset in addition to having tactical problem-solving experience. Working closely with the customer account team by actively participating and influencing the technical strategy and execution for the customer Work with R&D to improve the design flow, QoR, and runtime of the design. Perform multiple what-if analyses using models to determine QoR sweet spot and present results. Perform support process including diagnosing, troubleshooting, and providing workarounds for product bugs, and providing solutions for a wide range of complex issues covering usage, methodology, product defects, and interoperability. Perform block-level place and route and close the design to meet timing, area, and power constraints.

Experience

3 yrs 11 mos
Total Experience
3 yrs 11 mos
Average Tenure
3 yrs 11 mos
Current Experience

Synopsys inc

2 roles

Senior Application Engineer

Promoted

Feb 2024Present · 2 yrs 4 mos

PythonTCLStatic Timing AnalysisFusion compilerPPAPhysical Design+23

Application Engineer II

Jul 2022Feb 2024 · 1 yr 7 mos

Globalfoundries

Intern

Jun 2021Jun 2022 · 1 yr · Bengaluru, Karnataka, India

Physical Design

Education

University of Hyderabad

Master of Technology - MTech — VLSI

Jan 2019Jan 2021

Geethanjali College of Engineering and Technology

Bachelor of Technology - BTech

Jan 2015Jan 2019

Sri Chaitanya college Hyderabad

MPC — Intermediate

Jan 2013Jan 2015

Oxford model High school

May 2013Present

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