R

Ravinder Jassal

Software Engineer

Bengaluru, Karnataka, India4 yrs 9 mos experience
Highly Stable

Key Highlights

  • Experienced in ASIC and FPGA design.
  • Strong background in digital logic and circuit design.
  • Proficient in multiple programming languages including C and C++.
Stackforce AI infers this person is a Hardware Engineer specializing in ASIC and FPGA design within the semiconductor industry.

Contact

LinkedIn

Skills

Core Skills

Asic DesignFpga DesignDigital Logic

Other Skills

VerilogSPIRTL DesignCPLD DesignDigital Circuit DesignSystemVerilogVHDLI2CC (Programming Language)C++RISC-VProcessor DesignXilinx VivadoField-Programmable Gate Arrays (FPGA)Application-Specific Integrated Circuits (ASIC)

Experience

4 yrs 9 mos
Total Experience
4 yrs 5 mos
Average Tenure
4 mos
Current Experience

Hewlett packard enterprise

Electrical/Hardware Engineer II

Feb 2026 – Present · 4 mos · Bengaluru, Karnataka, India · On-site

ASIC Design

Juniper networks

2 roles

Hardware Engineer 3

Promoted

Aug 2023 – Jan 2026 · 2 yrs 5 mos · On-site

FPGA DesignASIC Design

Hardware Engineer 2

Jul 2021 – Jul 2023 · 2 yrs · On-site

VerilogDigital Logic

Education

Indian Institute of Science (IISc)

Master of Technology - MTech — Nanoscience and Engineering

Jan 2019 – Jan 2021

Punjab Engineering College

Bachelor of Technology - BTech — Electrical Engineering

Jan 2015 – Jan 2019

Stackforce found 100+ more professionals with Asic Design & Fpga Design

Explore similar profiles based on matching skills and experience

Farha R.

Farha R.

DFAE FPGA

at Macnica Cytech Pte Ltd

Singapore, Singapore3 yrs 9 mos exp
FPGA DevelopmentRTL Design
Sattaru Keerthan Reddy

Sattaru Keerthan Reddy

Deputy Engineer

at Bharat Electronics Limited

Bengaluru, India1 yr 10 mos exp
VHDLRTL Coding
Nagarjuna Goranti

Nagarjuna Goranti

Senior Engineer

at Synopsys Inc

Hyderabad, India8 yrs exp
Functional VerificationFormal VerificationPerformance Analysis
NP

Narendra Prasad

Senior Lead Engineer

at Qualcomm

Bengaluru, India7 yrs 10 mos exp
Logic DesignASICSemiconductor Engineering
SY

Suhail yousuf

Master phd

at Pukyong National University

Srinagar, India1 yr 9 mos exp
Machine LearningArtificial Intelligence
Deepak Prasad

Deepak Prasad

Software Engineer

at Cisco

Guwahati, India3 yrs 1 mo exp
Network Security
Vinay Gowda

Vinay Gowda

Physical Design Engineer

at SmartSoC Solutions Pvt Ltd

Bengaluru, India3 yrs exp
Physical DesignASIC DesignStatic Timing Analysis
Kolipaka Vivek Vardhan

Kolipaka Vivek Vardhan

ASIC Digital Design Engineer Senior

at Synopsys Inc

Bengaluru, India4 yrs exp
Application-Specific Integrated Circuits (ASIC)Very-Large-Scale Integration (VLSI)