R

Raju .

Software Engineer

India2 yrs 11 mos experience

Key Highlights

  • Expert in Analog Circuit Design and Mixed-Signal IC Design.
  • Hands-on experience with advanced PVT analysis and reliability verification.
  • Strong foundation in VLSI design and digital electronics.
Stackforce AI infers this person is a Microelectronics expert with a focus on Analog and Mixed-Signal IC Design.

Contact

Skills

Core Skills

Analog Circuit DesignMixed-signal Ic DesignDigital ElectronicsElectrical Engineering

Other Skills

Analog-Digital Phase-Locked Loop (ADPLL)PVT analysisaging simulationsreliability verificationtestbench creationPVT & MC simulationsschematic optimizationcurrent mirrorsbias circuitsvoltage regulatorsschematic designsimulation environmentslayout review coordinationDigital VLSI designBasic Electrical & Electronics Lab

About

Experience on Ring based PLL (Architecture of PLL & Circuit Design of PFD, Charge Pump, LPF, Ring Oscillator & Local Oscillator Blocks) Worked on fdsoi 22nm(gf ) ,65nm, 180nm CMOS in Cadence Virtuoso. Course- Analog IC design, Digital IC design, Hardware Design Methodlogy, Digital System Design, MOS device Physics , RF Microelectronics, Computer Organization and Architecture. Skilled/Interest - #CMOS based amplifiers, #STA, #PLL #Analog IC Designing, #Digital IC Designing and #verification, #ASIC Design #Static Timing Analysis (STA) Tools and Languages: Simulation Tool: PSpice, LT-Spice,Cadence Virtuoso HDL: Verilog (Xilinx Vivado) NEGF & DFT Tool:Synopsys QuantumATK Programming Skills: Verilog, MATLAB, Basic C,Java. Linux

Experience

2 yrs 11 mos
Total Experience
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Average Tenure
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Current Experience

Sasken technologies limited

Analog Circuit Design Engineer

Mar 2024Present · 2 yrs 3 mos · Bengaluru, Karnataka, India

  • Client - intel(USA )
  • AMS Design & Verification Engineer (Contract) - AD-PLL IP, Intel
  • Working on the Analog-Digital Phase-Locked Loop (ADPLL) IP, focusing on key AMS blocks including
  • CLKin, AnaDFX .
  • also PERC for elecyrical verification which can'nt be checked by drc and lvs
  • Performed PVT analysis, aging simulations, and reliability verification (RV) to ensure robust performance across process, voltage, and temperature variations.
  • also Contributed to testbench creation, PVT & MC simulations, and schematic optimization.
  • Actively involved in pre & post-layout simulations
Analog-Digital Phase-Locked Loop (ADPLL)PVT analysisaging simulationsreliability verificationtestbench creationPVT & MC simulations+3

Singularityaix

Jr .Analog Circuit Design Engineer

Jul 2023Mar 2024 · 8 mos · Ahmedabad, Gujarat, India · Hybrid

  • 1) Gained hands-on experience in basic analog building blocks: current mirrors, bias circuits, voltage regulators.
  • 2) Worked on schematic design, simulation environments, and layout review coordination.
  • 3) Collaborated with senior designers for IP delivery and validation.
  • 4) Focused on various BGR and LDO circuit designs.
  • and debugging
current mirrorsbias circuitsvoltage regulatorsschematic designsimulation environmentslayout review coordination+2

Indraprastha institute of information technology, delhi

IIIT DELHI VLSI SUMMER TRAINING

Jun 2022Aug 2022 · 2 mos · Delhi, India

Indian institute of information technology

Teaching Assistant

Feb 2022Jul 2023 · 1 yr 5 mos · Prayagraj, Uttar Pradesh, India

  • Helped them in subject like Digital VLSI design,Digital Electronics.
  • Helped them with their acadmic by arranging meetings with their mentors and maintained a good report with them.
Digital VLSI designDigital Electronics

B.p mandal coollege of engineering madhepura bihar

Internship Trainee

Feb 2021Oct 2021 · 8 mos · India · Hybrid

  • NATS Internship as Working as Lab assistant & manage Lab activities of Basic Electrical & Electronics Lab,VLSI Design Lab
Basic Electrical & Electronics LabVLSI Design LabElectrical Engineering

Indian railways

East Central railway

Jan 2019Feb 2019 · 1 mo · India

  • I have undergone training in core activities of electrical activities like Roof mounted package of SGAC & LHB types DG set of Power Car switch board cabinet,750 supply feeder pantry car electrical equipment during this session.

Education

Indian Institute Of Information Technology Allahabad

Master of Technology — Electrical and Electronics Engineering

Jun 2021Jun 2023

Institute Of Engineering and Management

B.tech — Electrical and Electronics Engineering

Thakur prasad college patna (Bihar School Education board)

Higher secondary — Science (mathematics)

Jun 2013Jun 2015

FIITJEE

JEE Advance preparation

Oct 2013Jul 2015

Jawahar Navodaya Vidyalaya - JNV

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