A

A Abhi

Software Engineer

Bengaluru, Karnataka, India11 yrs experience
Highly Stable

Key Highlights

  • Over 10 years in ASIC/SoC Design Verification.
  • Led low-power verification teams at ARM and Qualcomm.
  • Recognized for delivering high-quality results under tight timelines.
Stackforce AI infers this person is a Design Verification Engineer specializing in low-power SoC and ASIC technologies.

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Skills

Core Skills

Low Power SocUvm

Other Skills

low-power design methodologiesUVM-based testbench developmentUPF verificationPCK-600 Power Control KitCHIAXILPIAPBDSP Subsystem Low Power Aware VerificationUniversal Verification Methodology (UVM)System VerilogVerilogNC-VerilogVerilog-AMSVHDL

About

I’m a passionate and results-oriented Design Verification Engineer with over 10 years of experience in SoC and ASIC verification. My expertise spans low-power design methodologies, UVM-based testbench development, and UPF verification using industry tools like Questa, Visualizer, VCS, and Verdi. Currently at ARM, I lead SoC-level low-power verification using PCK-600 Power Control Kit and protocols such as CHI, AXI, LPI, and APB. I’ve previously lead DSP low power verification team at Qualcomm, achieving multiple QUALSTAR and global recognitions for delivering high-quality results under tight timelines. I enjoy solving complex challenges, mentoring engineers, and building automation flows that accelerate verification cycles. Open to networking, learning, and contributing to next-gen silicon innovation.

Experience

11 yrs
Total Experience
2 yrs 11 mos
Average Tenure
2 yrs 2 mos
Current Experience

Arm

Staff Verification Engineer

Apr 2024Present · 2 yrs 2 mos · Bengaluru, Karnataka, India

low-power design methodologiesUVM-based testbench developmentUPF verificationPCK-600 Power Control KitCHIAXI+4

Qualcomm

2 roles

Senior Lead Engineer

Dec 2021Apr 2024 · 2 yrs 4 mos

  • Worked with DSP Subsystem Low Power Aware Verification Team.
DSP Subsystem Low Power Aware VerificationLow Power SoC

Senior Engineer

Nov 2018Nov 2021 · 3 yrs

Analog devices [via sibot technologies]

Design Verification Engineer

Aug 2017Oct 2018 · 1 yr 2 mos · Bengaluru Area, India

Wipro

Design Verification Engineer (VLSI)

Mar 2015Jul 2017 · 2 yrs 4 mos · Pune Area, India

Education

C - DAC, NOIDA

DIVESD( Diploma In VLSI & Embedded System Design) — VLSI Design & Verification

Jan 2014Jan 2015

GZS PTU Campus,Bathinda

Bachelor's degree — ECE

Jan 2010Jan 2014

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