AmitraSudan Kar

Software Engineer

Bengaluru, Karnataka, India22 yrs 5 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Post & Pre Silicon Validation.
  • Proficient in FPGA debug and board design.
  • Strong background in automation frameworks.
Stackforce AI infers this person is a Semiconductor Validation Engineer with expertise in silicon validation and automation.

Contact

Skills

Core Skills

Silicon ValidationAutomation

Other Skills

EthernetPython (Programming Language)SAS/SATAVerilogFunctional VerificationASICSoCSystemVerilogI2CXilinxHardware ArchitectureARMModelSimFormal VerificationFPGA

About

A professional engineer having expertise in the areas of: Post & Pre Silicon Validation. Ability to work in FPGA debug along with board design and testing.

Experience

22 yrs 5 mos
Total Experience
2 yrs 9 mos
Average Tenure
9 yrs 2 mos
Current Experience

Qualcomm

2 roles

Senior Staff Engineer

Promoted

Dec 2024Present · 1 yr 6 mos · Bengaluru, Karnataka, India

Staff Engineer

Apr 2017Dec 2024 · 7 yrs 8 mos · Bengaluru, Karnataka, India

  • SLT, RMA Analysis, Sysdebug, CPU Power and Performance for MSMs

Microsemi corporation

Member Of Technical Staff

Nov 2015Mar 2017 · 1 yr 4 mos · Hyderabad, Telangana, India

  • Post silicon validation of GB Ethernet Switch
EthernetSilicon Validation

Einfochips

Senior Technical Lead

Nov 2014Oct 2015 · 11 mos · Pune Area, India

  • Automation framework development in Python for a Post Silicon Validation environment
Python (Programming Language)Automation

Lsi corporation

Senior System Engineer

Dec 2011Oct 2014 · 2 yrs 10 mos · Pune Area, India

  • Post silicon validation of SAS transport layer controller.
SAS/SATASilicon Validation

Intel

Component Design Engineer

May 2010Dec 2011 · 1 yr 7 mos · Bangalore

  • Graphics Processor Validation

Wipro

2 roles

Senior Project Engineer

Jan 2008Jul 2009 · 1 yr 6 mos

  • On Chip Pre Silicon Validation):
  • Pre silicon validation of various modules including audio and buffered serial ports, UART, I2S, IrDA, CIR and Modem interfaces connected on a OCP bus of a multi-core System On Chip.

Senior Project Engineer

Dec 2006Dec 2007 · 1 yr

  • Development of hardware design document, test bench document of different modules like arbiter, serial interface like Management Data Input Output (MDIO), etc as a part of the Competency Group.

Stmicroelectronics

Software Engineer

Oct 2003Sep 2005 · 1 yr 11 mos · Noida Area, India

  • Post Silicon Validation
  • Accountabilities
  • Validating intellectual properties like I2C and Memory Controller connected to ST Multimedia Phone on Chip.

Himachal futuristic communication limited (hfcl)

Member of Technical Staff

Jul 2001Sep 2003 · 2 yrs 2 mos · Gurgaon, India

  • Accountability:
  • Design, development and testing of an eight-port ADSL line card.
  • Developing hardware requirement specifications followed by hardware design document of the sub system.
  • Selecting and procuring the components, creating BOM, schematic drawing and assisting in PCB layout followed by system testing.

Education

The University of Edinburgh

MSc — System Level Integration

Jan 2005Jan 2006

IEM, University of Kalyani, West Bengal

2006 M.Sc; B.E; M.Sc.) studies — Electronics & Communication Engineering; Electronic engineering

Jan 1997Jan 2001

University of Kalyani

Jan 1997Jan 2001

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