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Anuja Agnihotri

Product Engineer

Raleigh, North Carolina, United States5 yrs 9 mos experience
Highly Stable

Key Highlights

  • Expertise in ASIC Design and Verification.
  • Strong background in functional safety standards.
  • Pursuing advanced studies in Computer Architecture.
Stackforce AI infers this person is a Semiconductor and Robotics expert with a focus on ASIC Design and Verification.

Contact

Skills

Core Skills

Embedded SystemsFunctional Verification

Other Skills

Robot Operating System (ROS)ISO 26262Functional CoverageLinuxSystemVerilogC (Programming Language)AlgorithmsHigh Performance Computing (HPC)OpenMPSST (Structural Simulation Toolkit)Parallel ComputingSystem SimulationPerformance AnalysisCache CoherenceProtocol Debugging

About

My career in hardware engineering began at a soldering bench in undergrad and has since taken me through ASIC verification at Synopsys, where I worked on UCIe and PCIe interface controller IPs under ISO 26262 functional safety standards. Now pursuing a Master's in Computer Engineering at NC State, with a focus on Computer Architecture and VLSI, I am channeling that industry experience into academic depth — exploring ASIC Design and Verification, CPU/GPU computing, and the architectures that will define next-generation silicon beyond the constraints of Moore’s Law. I am actively seeking co-op or internship opportunities in ASIC Design, Verification, and Computer Architecture.

Experience

5 yrs 9 mos
Total Experience
2 yrs 10 mos
Average Tenure
--
Current Experience

North carolina state university

Student Researcher

Feb 2026Present · 4 mos · Weaver Laboratories, NC State University · Hybrid

  • Collaborating with a team to enhance a system architecture for an autonomous aquatic surface vehicle(aqua-boat) used in fish farming.
  • Engineering a NVIDIA Jetson Nano-based ROS package for robotic-sensor control and communication with the ground station which will increase system performance by enabling parallelism in robot operations, contributing to the vehicle's overall efficiency.
Robot Operating System (ROS)Embedded Systems

Synopsys inc

2 roles

ASIC Digital Design, Senior Engineer

Promoted

Feb 2025Nov 2025 · 9 mos · On-site

  • I contributed to the functional verification and development of digital interface controller IPs, focusing on UCIe and PCIe protocols while ensuring their automotive compliance.
  • Engaged in verification processes and traceability to uphold functional safety standard ISO26262 for UCIe and PCIe IP
  • Collaborated with cross-functional teams to foster innovation and improve design methodologies.
  • Enhanced my knowledge in the domain of functional verification of IP and compliance within the automotive sector at Synopsys Inc.
ISO 26262Functional CoverageFunctional Verification

ASIC Digital Design, Engineer

Jul 2023Feb 2025 · 1 yr 7 mos · On-site

  • Part of Solutions Group - Digital Interface Controller IPs at Synopsys.
LinuxSystemVerilog

Robot study circle coep

Senior Team Member

Jan 2020Jun 2023 · 3 yrs 5 mos · Pune Division, Maharashtra, India · On-site

C (Programming Language)Algorithms

Education

North Carolina State University

Master's degree — Computer Engineering

Jan 2026Dec 2027

COEP Technological University

Bachelor of Technology - BTech — Electrical Engineering

Aug 2019May 2023

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