Anurag Agarwal — Software Engineer

9 years of experience in Structural Verification of memories - Memory Built-In Self Test (MBIST). Worked on various aspects of Memory testing - insertion, repair, RTL/GLS verification, post silicon debugs, algorithms. Worked on MBIST tools like SMS/LVISION. Also worked on scan insertion & ATPG bring up at core level. * Worked as MBIST lead for various Projects in snapdragon, Modem and automotive product lines handling from RTL to silicon. * Memory BIST insertion at SoC Design & IP level cores. * Complex IP’s with shared bus interface insertion and verification using LV and MMB tool. * Requirements of Custom algorithm , and coverage analysis *Timing and zero delay simulations * Post silicon debugs and yield improvement on both ATE & SLT platforms. * Tic based Simulations for Memory Controller's across Voltage corners. *Worked on automotive enhancements for in system bist design and debugs at pre and post silicon including pattern delivery & simulations. * Automation scripts in perl to reduce manual efforts and enhance quality of RTL & Acheive 100% FTR

Stackforce AI infers this person is a VLSI engineer specializing in memory testing and automotive applications.

Location: Bengaluru, Karnataka, India

Experience: 9 yrs 9 mos