arunraju wadeyar — Software Engineer
VLSI professional with 7+ years of experience in the VLSI Back end. Worked on STA and Synthesis, Physical Design, Standard Cell Layout. Previously worked on PCIE Gen5 & Synthesis and STA for 2.5D Chiplet Designs. worked on constraints development and STA for PCIE switchGen6 product line up. currently working on the PCIE switch Gen7 product.
Stackforce AI infers this person is a VLSI backend engineer specializing in timing analysis and physical design.
Location: Bengaluru, Karnataka, India
Experience: 8 yrs 11 mos
Skills
- Static Timing Analysis
- Physical Design
- Synthesis
Career Highlights
- 7+ years of VLSI backend experience.
- Expertise in Static Timing Analysis and Physical Design.
- Contributed to multiple generations of PCIE switch products.
Work Experience
Microchip Technology Inc.
Senior Implementation Engineer (4 yrs 1 mo)
FrenusTech Pvt Ltd
Senior Design Engineer (11 mos)
Physical Designer/STA (4 yrs 10 mos)
Microsemi Corporation
STA/Synthesis (Consultant) (3 yrs 8 mos)
Vivartan Technologies
Professional Development Program in Full Custom Physical Design (Layout) (5 mos)
Education
Bachelor of Engineering - BE at Electrical, Electronics and Communications Engineering
