Ashutosh Trivedi

CTO

Bengaluru, Karnataka, India1 yr 10 mos experience

Most Likely To Switch

Key Highlights

Technical Lead with expertise in physical design engineering.
Strong foundation in electronic design and technology.
Proficient in multiple programming languages and tools.

Stackforce AI infers this person is a Technical Lead in Electronic Design Automation with a focus on FPGA and physical design.

Contact

Skills

Core Skills

Cadence InnovusVerilog

Other Skills

ANSYS HFSSC++Field-Programmable Gate Arrays (FPGA)XilinxDevelopment ToolsCadence genusCadence VirtuosoPublic SpeakingProgrammingTeamworkMySQLC (Programming Language)Microsoft WordMATLABProblem Solving

Experience

1 yr 10 mos

Total Experience

9 mos

Average Tenure

11 mos

Current Experience

Hcltech

Technical Lead

Jul 2025 – Present · 11 mos · Bengaluru, Karnataka, India

Physical Design Engineer | STA

Cadence innovusVerilogANSYS HFSSC++Field-Programmable Gate Arrays (FPGA)Xilinx+3

Centre for career development nit calicut

Placement Representative

Jan 2025 – Jul 2025 · 6 mos

Students affairs council, nit calicut

Branch Representative

Oct 2024 – Mar 2025 · 5 mos

National institute of technology calicut

Teaching Assistant

Aug 2024 – Jun 2025 · 10 mos · Kojikode Kerala

Education

National Institute of Technology Calicut

Master of Technology - MTech — Electronic design and technology

Aug 2023 – Jul 2025

Government Engineering College kannauj

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jan 2018 – Jan 2021

Board of Technical Education, Uttar Pradesh (BTEUP)

Diploma in Mechanical Engineering

Sep 2016 – May 2018

J S Memo Senior Secondary School Mainpuri

Intermediate — Science

Agra Vanasthali Vidyalaya Agra

Highschool

Stackforce found 100+ more professionals with Cadence Innovus & Verilog

Explore similar profiles based on matching skills and experience

Senthil Kumar Murugaiah

Sr. Manager Silicon Design Engineering

at AMD

Hyderabad, India25 yrs 8 mos exp

Product ManagementEngineering Management

Sushil Sirsat

Research Scholar

at Visvesvaraya National Institute of Technology

India12 yrs 7 mos exp

Analog Integrated Circuit DesignSignal Integrity

ABHINANDAN .

Analog Design Engineer (External)

at Synopsys Inc

Una, India2 yrs exp

Analog Circuit Design

Sreekanth Billupati

Digital Design Engineer

at C2i Semiconductors

Sri Potti Sriramulu Nellore, India6 yrs 11 mos exp

Product Design5G New Radio (NR)Team Leadership

Varun Kumar

Synthesis/STA Engineer (Contractor)

at AMD

Hyderabad, India1 yr 1 mo exp

Integrated Circuit DesignPhysical Design

Ankur Kumar

Senior Flight Software Enginner

at Pixxel

Bengaluru, India5 yrs 6 mos exp

Embedded LinuxFPGA DesignRTL DesignVerification and ValidationSubject Matter Expertise

Basannagouda Reddy

Director R&D

at Synopsys Inc

San Francisco, United States23 yrs 2 mos exp

BAJAMMA SHAIK

Physical Design Engineer

at HCLTech

Guntur, India1 yr 1 mo exp

Physical DesignVLSI