A

Ayush Khare

DevOps Engineer

Karnataka, India6 yrs 6 mos experience

Key Highlights

  • Expert in ASIC design and automation.
  • Led physical design for high-performance projects.
  • Strong background in VLSI and digital circuit design.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and chip design automation.

Contact

LinkedIn

Skills

Core Skills

Asic DesignChip Design Automation

Other Skills

automation of chip designphysical design processpower, performance and area (PPA) targetsVery-Large-Scale Integration (VLSI)VerilogDigital Circuit DesignCMOS

Experience

6 yrs 6 mos
Total Experience
2 yrs 3 mos
Average Tenure
1 yr 11 mos
Current Experience

Cadence design systems

Lead Application Engineer

Jul 2024 – Present · 1 yr 11 mos · Bengaluru, Karnataka, India

Synopsys inc

Senior Engineer

Feb 2022 – Jul 2024 · 2 yrs 5 mos

  • I was a part of the DSO.ai R&D team and involved in the automation of chip design. I have lead the physical design process for high performance ASIC projects, ensuring designs meet
  • power, performance and area (PPA) targets.
automation of chip designphysical design processpower, performance and area (PPA) targetsASIC DesignChip Design Automation

Signoff semiconductors

Physical Design Engineer

Dec 2019 – Feb 2022 · 2 yrs 2 mos · Bengaluru Area, India

Education

Delhi Technological University (Formerly DCE)

Master's degree — VLSI design

Jan 2017 – Jan 2019

Stackforce found 100+ more professionals with Asic Design & Chip Design Automation

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