Dharamvir Chundavat

Software Engineer

Pune, Maharashtra, India10 yrs 10 mos experience
Highly Stable

Key Highlights

  • Experienced in VLSI design verification.
  • Strong background in semiconductor technologies.
  • Proficient in multiple hardware description languages.
Stackforce AI infers this person is a VLSI Design Verification Engineer with expertise in semiconductor technologies.

Contact

LinkedIn

Skills

Other Skills

TestingVLSIVHDLVerilogSystem VerilogUVMCElectronicsC++SemiconductorsSimulationsProgramming

Experience

10 yrs 10 mos
Total Experience
2 yrs 7 mos
Average Tenure
4 mos
Current Experience

Nxp semiconductors

Principal Engineer

Feb 2026 – Present · 4 mos · Pune, Maharashtra, India

Marvell technology

3 roles

Senior Staff Engineer

Promoted

Oct 2023 – Feb 2026 · 2 yrs 4 mos

Senior Engineer

Apr 2021 – Oct 2023 · 2 yrs 6 mos

Design Verification Engineer

Nov 2018 – Apr 2021 · 2 yrs 5 mos

L&t technology services

Sr Engineer

Apr 2018 – Nov 2018 · 7 mos · Pune, Maharashtra, India

Cyient

Design Engineer

Nov 2017 – Apr 2018 · 5 mos · Pune, Maharashtra, India

Appliedmicro

Verification Engineer

Aug 2015 – Nov 2017 · 2 yrs 3 mos · Pune, India

Education

CDAC ACTS Pune

Post Graduate Diploma — VLSI

Jan 2015 – Jan 2015

Government Engineering College, Bharuch

Bachelor’s Degree — Electronics and Communications Engineering

Jan 2010 – Jan 2014

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