Dhruthi Prakash — Product Engineer

• Good Understanding of CMOS Fundamentals, MOS Transistor and FinFET theory. • Good understanding of Second order effects in MOSFET. • Conceptual Understanding of IC Fabrication and Physical Design Process. • Efficient in drawing Schematic and Stick diagram for different MOS circuits such as CMOS Inverter, NAND, NOR, AND, OR and other logic expression. • Knowledge on Technology‐related and Manufacturing Issues: DRC (Design Rule Check), LVS (Layout Versus Schematic), IR Drop, Antenna Effect, Latch‐Up, Well‐proximity Effect, LOD (Length of Diffusion). • Familiarity of Physical Design Concepts: Floor Planning, Power Grids, Area Utilization. • Hands‐on experience in resolving commonly encountered LVS errors (Shorts, Opens, Device/Pin Mismatch errors) and DRC errors (Minimum Area, Spacing errors, Metal‐width errors, Minimum Enclosure). • Good understanding of SRAM, Memory architecture (Row Decoder, Column I/O, Control Block) and Bit-Cell operation. • Capable of interpreting the Foundry Document and understanding various rules to design efficient layout. • Designed layout for Analog Circuit which included concepts such as Matching techniques (Common centroid, Interdigitation), Crosstalk, Shielding, Guard ring, Dummies.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Analog Integrated Circuit Design.

Location: Bengaluru, Karnataka, India

Experience: 2 yrs 6 mos