Feb 2024 – Present · 2 yrs 4 mos · Hybrid

• ● Perform Mixed Signal simulations for performance, timing and close loop validation;
• ● Collect, track and analyze results;
• ● Use Source Code Management / Version Control tools;
• ● Determine and implement new approaches to enhance Digital
• and Mixed-Signal Simulation Verification Flows;
• ● Debug and report issues using Bug Trackers;
• ● Interact with other Teams (such as Circuit, Prototype and Design Teams) daily to determine key risks, improvements and new features;
• ● Maintain verification environments (UVM based) as well as create Checkers, SVA's, Interfaces, and UVM components;
• ● Run simulations and regressions to validate the design of DDR
• PHY's (DDR54, LPDDR6/5/4X, HBM4)