Ganesh Shirke — Director of Engineering

Seasoned professional with over two decades of extensive experience in ASIC verification engineering, I have gained profound experience in Subsystem and IP level verification and an in-depth understanding of verification methodologies such as UVM, OVM, and Vera-NTB, enabling me to develop highly efficient and reusable verification environments. I have built and optimized SV-UVM testbenches, ensuring quality and compliance in complex design projects. Throughout my career, I have consistently focused on driving RTL verification planning, execution, and innovative methodology development. I possess a proven track record of managing large-scale projects while handling multiple tape-outs across storage, multimedia, graphics, and networking domains. My expertise extends to performing in-depth code and functional coverage analysis, ensuring that all verification activities meet stringent quality goals. I have successfully contributed to the development and implementation of formal verification environments, emphasizing rigorous testing and compliance. By aligning test planning with design specifications, I have consistently delivered results that exceed expectations. My skill set also includes managing cross-functional teams across various geographical locations, driving team productivity, fostering a collaborative work culture, and introducing automation to improve efficiency. I am highly adept at aligning verification strategies with long-term organizational objectives and consistently meeting both technical and business goals. As a leader, I have built and mentored high-performance teams, promoting a culture of continuous improvement and innovation. My ability to adapt to new methodologies and manage resources effectively has ensured successful project deliveries. I have a strong focus on leveraging automation to streamline processes, reduce manual effort, and improve overall productivity. Over the years, I have developed an acute ability to balance project development with resource constraints, ensuring optimal outcomes even in challenging envs. In addition, I have gained a rich understanding of a variety of protocols, including USB, SAS, Ethernet, AMBA and PCI, which has further enhanced my ability to deliver results in complex verification environments. Whether it's driving the verification of next-generation designs or collaborating with design and micro-architecture teams, I bring a rich experience and a solution-oriented approach to every project.

Stackforce AI infers this person is a seasoned ASIC verification engineer with extensive experience in semiconductor design and verification.

Location: Bengaluru, Karnataka, India

Experience: 23 yrs 10 mos