HARISH RAO L — Software Engineer
Proficient in PD Flow from Synthesis to GDSII. Hands on experience on entire PD flow from RTL to GDSII (Synthesis, Floor planning, Power grid analysis, Placement, CTS, Routing & timing closure of the block) Strong knowledge of Static Timing Analysis (STA) & Physical verification (Pv)
Stackforce AI infers this person is a Physical Design Engineer specializing in VLSI and ASIC development.
Location: Hyderabad, Telangana, India
Experience: 2 yrs 10 mos
Skills
- Physical Design Engineer
- Digital Hardware Design
- Synthesis Design
Career Highlights
- Proficient in complete PD flow from RTL to GDSII.
- Strong expertise in Static Timing Analysis and Physical Verification.
- Hands-on experience with leading EDA tools like Cadence and Synopsys.
Work Experience
Intel
Physical Design Engineer (On contract) (5 mos)
MediaTek
Physical Design Engineer (On Contract) (1 yr 1 mo)
Incise Infotech Private Limited
Physical Design Engineer (1 yr)
MosChip Institute of Silicon Systems (M-ISS)
Physical Design Engineer (5 mos)
Education
Master's degree at MLR Institute of Technology
Bachelor's degree at Jawaharlal Nehru Technological University
10+2(Intermediate) at Narayana Junior College, Ghatkesar, Hyderabad
10TH(SSC) at Geetanjali high school, kupriyal, kamareddy