Hemadri satya srinivasa vadhi raja — Software Engineer

I am a passionate and dedicated ASIC Design and Verification Engineer, with expertise in digital circuit design, hardware verification, and optimization. My journey into the VLSI domain began during my bachelor's studies, where I acquired a solid foundation in digital electronics, Verilog. Since then, I have been actively working on complex projects, leveraging advanced tools and methodologies to create innovative and efficient hardware solutions. * Proficient in Verilog, System Verilog and UVM for hardware design and verification. * Strong programming skills in Python and C Programming. * Hands-on experience with tools like Xilinx Vivado, Cadence NCsim, Cadence Virtuoso, Xilinx ISE and Synopsys VCS.

Stackforce AI infers this person is a VLSI Design Engineer with expertise in ASIC design and verification.

Location: Hyderabad, Telangana, India

Experience: 1 yr 4 mos