J

Jaganath Singh

Software Engineer

Bengaluru, Karnataka, India7 yrs 8 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in Automatic Test Pattern Generation and Debugging.
  • Strong foundation in Digital Electronics and Verilog.
  • Proficient in Linux and Perl for design automation.
Stackforce AI infers this person is a DFT Engineer with expertise in digital design and testing methodologies.

Contact

Skills

Core Skills

Automatic Test Pattern Generation (atpg)Debugging

Other Skills

Scan InsertionDigital ElectronicsVerilogPerlLinuxTetramaxSCAN COMPRESSIONVCS SIMULATIONDC compiler

About

.

Experience

7 yrs 8 mos
Total Experience
2 yrs 6 mos
Average Tenure
5 yrs 1 mo
Current Experience

Insemi technology services pvt. ltd.

3 roles

Staff Design Engineer

Jul 2024Present · 1 yr 11 mos

Scan InsertionAutomatic Test Pattern Generation (ATPG)DebuggingDigital ElectronicsVerilogPerl+5

Senior Design Engineer

Promoted

May 2022Jul 2024 · 2 yrs 2 mos

Design Engineer

May 2021May 2022 · 1 yr

Pozibility technologies pvt ltd

DFT Engineer

Mar 2020May 2021 · 1 yr 2 mos · Bengaluru, Karnataka, India

Videotronix

Test Engineer

Dec 2017May 2019 · 1 yr 5 mos · Bengaluru, Karnataka, India

Education

Visvesvaraya Technological University

Bachelor of Engineering - BE

Jan 2013Jan 2017

Stackforce found 100+ more professionals with Automatic Test Pattern Generation (atpg) & Debugging

Explore similar profiles based on matching skills and experience