Sep 2021 – Sep 2024 · 3 yrs

• RTL Design, Integration and Methodology - for Automotive and AI SoCs
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• RTL Design and Integration of ARM based SoCs
• RTL Flows and Methodology Enablement from scratch
• UPF Creation, Validation, and Simulation
• Mentor and Technical Lead

Sep 2018 – Sep 2021 · 3 yrs

• Digital Implementation CAD - Tools, Flows, and Methodology - for Graphics IP/SoCs
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• World-wide Ownership of Synthesis and DFT Scan – multi-vendor tools, flows and methodology
• Deployment lead for Fusion Compiler based digital implantation flow and solution spanning over Synthesis, DFT Scan, APR ( Auto Place and Route ) with sign-off quality Formal and Low-power Verification
• Drive engagements with multiple EDA vendors across multiple sites, delivering best-in-class TFM solutions to world-wide design teams

Jul 2015 – Aug 2018 · 3 yrs 1 mo · Bengaluru, Karnataka, India

• Digital Front End CAD - Tools, Automation and Methodology - for Mobile SoCs
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• Advanced Low Power Synthesis - multi-vendor tools, flows and methodology ownership
• Drive engagements with multiple EDA vendors towards delivering best-in-class solutions to design team
• Lead a team of 4 engineers
• Handoff and Front-End QoR Dashbord for FE to PD sign-off
• Unified flow for RTL quality check and sign-off

Aug 2011 – Jun 2015 · 3 yrs 10 mos

• Digital Front End Design, Analysis and Verification - for DSP SoCs
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• Digital Design and Integration using Verilog/System-Verilog RTL coding
• RTL Lint, CDC and DFT Analysis
• Various aspects of Memory Integration - Evaluation, Specification, Error Protection
• Memory BIST Architecture, Integration and Verification
• Formal Equivalence Checks
• Digital Design Verification using SV testbenches
• Mixed Signal Verification

Jul 2010 – Jul 2011 · 1 yr · Kanpur Area, India

• Writer Dependent Cursive Handwriting Synthesis from Offline Samples
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• In this thesis we aim at developing a novel and effective approach to synthesize English handwriting in the user’s writing style. Synthesis of handwriting pose a challenge as writer specific features need to captured and preserved, yet at the same time, variability between handwriting should also be taken into account. Even with the given model, synthesis should not be deterministic since the variations that are found in human handwriting are stochastic.

Jul 2009 – Jun 2010 · 11 mos · Kanpur Area, India

• Assisted Dr. Adrish Banerjee in developing DSP Lab. We developed and tested experiments for "Programming with DSP Processors" using TMS320C6713 DSP Starter Kit from Texas Instruments.

Jan 2009 – Apr 2009 · 3 mos · Ahmedabad Area, India

• B.E. final semester internship program as a part of the University curriculum.
• Study, Design and Development of DSP system for Fourier Transform Spectrometer
• Studied the Signal Processing requirements of Fourier Transform Spectrometer and designed the DSP (Digital Signal Processing) system to fulfill those requirements. Simulated the DSP system in MATLAB and demonstrated the implementation of the system on two types of hardware: (1) DSP Processor (2) Field Programmable Gate Array (FPGA).