Karan Padhiar

Intern

Jammu, Jammu & Kashmir, India0 mo experience

Key Highlights

  • Hands-on experience in post-silicon validation.
  • Implemented advanced display power management features.
  • Strong foundation in VLSI design and telecommunications.
Stackforce AI infers this person is a Semiconductor and Telecommunications professional with a focus on VLSI design.

Contact

Skills

Core Skills

Silicon ValidationDisplay IpTechnical CommunicationTelecom TechnologiesVlsi Design

Other Skills

Protocol AnalyzerGitHubDisplay Power ManagementDebuggingC programmingUEFI/EDK toolsPythonLaboratory SkillsLTEMobile Packet Backbone NetworkVery-Large-Scale Integration (VLSI)S-editVISA CharacterizationETL ToolsEDK Tools

About

Working as a Graphics Hardware Intern at Intel in post-silicon validation of Display IP, with hands-on experience in functional validation, system-level debugging, and hardware–software interaction. Pursuing M.Tech in VLSI Design with a B.Tech in Electronics and Communication Engineering

Experience

0 mo
Total Experience
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Average Tenure
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Current Experience

Intel corporation

Graphics Hardware Intern

Jul 2025Present · 10 mos · Bengaluru, Karnataka, India · On-site

  • Working in Post Silicon functional validation of Display IP.
  • 1. Implemented Display Power Management features like Paner Self Refresh (PSR/PSR2), Panel Replay (PR), Variable Refresh Rate (VRR) and video compression techniques like Display Stream Compression.
  • 2. Debugged issues due to display power management features, collaborated with other teams and assisted in issue triage and structured debug flow.
  • 3. Developed C based Bare-Metal content for functional validation of display features using UEFI/EDK tools and python debug scripts used for programming at register level.
  • 4. Executed Silicon power-on validation activities and Display bring-up which helped to understand display protocols: eDP, DP, HDMI.
  • 5. Captured and analyzed Event Trace Log (ETL) using WPA and developed tests to mimic driver behaviour in synthetic environment.
Protocol AnalyzerGitHubSilicon ValidationDisplay Power ManagementDebuggingC programming+3

Dr b r ambedkar national institute of technology, jalandhar

Teaching Assistant

Aug 2024Jul 2025 · 11 mos · On-site

  • Conducted lab sessions (Microwave Engineering Lab & Digital Communication Lab), guiding students through experiments, and evaluating lab reports.
Laboratory SkillsTechnical Communication

Ericsson

Intern

Jan 2024Jun 2024 · 5 mos · Jammu & Kashmir, India · On-site

  • 1. Monitored and analyzed telecom technologies including VoWiFi, VoNR, VoIP across live network setups.
  • 2. Supported fault isolation and analysis of network performance parameters during live network issues.
LTEMobile Packet Backbone NetworkTelecom Technologies

Shri mata vaishno devi university

Summer Intern

Jun 2022Jul 2022 · 1 mo · Kakryal Katra · Hybrid

  • Research Intern on the Topic "Various VLSI adders and their Implementation"
Very-Large-Scale Integration (VLSI)S-editVLSI Design

Education

Dr B R Ambedkar National Institute of Technology, Jalandhar

Master of Technology - MTech — VLSI Design

Aug 2024Jul 2026

Shri Mata Vaishno Devi University

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jan 2020Jul 2024

Maharaja Harisingh Agricultural Collegiate School Nagbani

Senior Secondary — Non Medical

Apr 2019Mar 2020

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