K

Kurugunta Sanjitha

Software Engineer

Hyderabad, Telangana, India4 yrs 6 mos experience
Highly Stable

Key Highlights

  • Expert in Physical Design and Static Timing Analysis.
  • Proficient in scripting with TCL and shell.
  • Hands-on experience with Synopsys tools.
Stackforce AI infers this person is a Physical Design Engineer with expertise in VLSI and semiconductor industries.

Contact

Skills

Core Skills

Physical DesignStatic Timing AnalysisScripting

Other Skills

Project Teamsblock level PNR flowECO flowSynopsys IC Compiler 2C (Programming Language)Shell ScriptingICCprime time toolDesign Rule Checking (DRC)Layout Versus Schematic (LVS)Timing Closure

About

Good knowledge in block level PNR flow and ECO flow using Synopsys IC Compiler 2 and Prime Time tool. Good at STA and Physical Verification. Good at TCL and shell scripting.

Experience

4 yrs 6 mos
Total Experience
4 yrs 6 mos
Average Tenure
4 yrs 6 mos
Current Experience

Signoff semiconductors

Design Engineer -2

Dec 2021Present · 4 yrs 6 mos · Hyderabad, Telangana, India · On-site

Project TeamsPhysical DesignStatic Timing Analysis

Amd

Co-Op Engineer

Oct 2018Jul 2019 · 9 mos · Hyderabad Area, India

  • I have joined AMD as an intern during the second year of my M.E. (specialized in Embedded Systems and VLSI Design). I have good knowledge in block level PNR flow and ECO flow using Synopsys IC Compiler 2 and good at scripting.
block level PNR flowECO flowSynopsys IC Compiler 2scriptingPhysical DesignScripting

Education

Vasavi College of Engg

Master of Engineering - MEng — Embedded System and VLSI Design

Jan 2017Jan 2019

Stackforce found 100+ more professionals with Physical Design & Static Timing Analysis

Explore similar profiles based on matching skills and experience