Lalithesh Bandaru — Software Engineer
I'm currently working as a VLSI Physical Design Engineer. I worked on a 5nm tech project. dealt with ONO flow Blocks, have good understanding on UPF, DFP & MV flow of designs in Physical Design. Also worked on issues with Placement, CTS & Route stages. In continuous coordination with the FCT team solved all internal timing, DRVs, DRCs,LVS & other violations and successfully taped out both the tiles. Skills include: UNIX,TCL, Python, C language, Digital Electronics, PNR flow, STA, PV. Tools : Synopsys ICC2, Prime time,Cadence Virtuoso, Voltus. My hobbies are following the stock market, playing Chess, and learning new technologies.
Stackforce AI infers this person is a VLSI Physical Design Engineer with expertise in semiconductor technology.
Location: Bengaluru, Karnataka, India
Experience: 6 yrs
Skills
- Physical Design
- Static Timing Analysis
- Digital Electronics
Career Highlights
- Expertise in VLSI Physical Design and 5nm technology.
- Proficient in solving complex timing and design violations.
- Strong programming skills in Python and TCL.
Work Experience
Texas Instruments
Physical Design Engineer (1 yr 7 mos)
Soctronics
Engineer 1 (1 yr 3 mos)
Physical Design Engineer (1 yr)
AMD
Physical Design Engineer (contractor) (2 yrs 4 mos)
VEDA IIT
VLSI Physical Design Engineer Trainee (6 mos)
INDIAN SOCIETY FOR TECHNICAL EDUCATION (SVEC)
Secretary (1 yr 1 mo)
Student Coordinator (1 yr)
Education
BTech - Bachelor of Technology at Sree Vidyanikethan Engineering College, Tirupathi,
Intermediate at Narayana Junior College - India