Nagesh Kodavali — Co-Founder

We have spent the last decade building ultra-low-latency infrastructure for the capital markets, achieving nanosecond precision in high-frequency trading (HFT) systems globally. Today, we are leveraging that same proven, nanosecond-precision logic to solve the critical "AI I/O Wall"—the primary bottleneck in modern AI scaling and distributed training. As Co-Founder and CEO of Celerix Technologies, I lead a team specializing in FPGA-based hardware acceleration and high-performance trading systems. Our unique strength lies in applying expertise honed in equities trading to the demands of modern AI infrastructure: HFT-Grade Network Cores: Developing ultra-low-latency 100G/400G+ networking stacks, including RDMA and RoCE v2, that maximize throughput in both trading exchanges and GPU clusters. Sector-Spanning IP: Our hardware solutions are designed for the rigorous scale and reliability required by both high-frequency financial compliance and 2026 AI workloads. FPGA-Based Hardware Acceleration: Providing ready-to-deploy IP cores that allow companies to implement complex logic directly into hardware, achieving nanosecond-level performance. Solving the I/O Wall: Eliminating the friction between storage, memory, and compute to ensure data reaches the processor with zero wasted cycles. Our mission is to empower businesses with turn-key solutions and IP cores, enabling seamless implementation of business logic into FPGA products for unparalleled performance in financial services and AI computation.

Stackforce AI infers this person is a Fintech and AI infrastructure expert with a focus on high-performance systems.

Location: San Francisco, California, United States

Experience: 22 yrs 6 mos