Neha Dhek — Software Engineer
Experience of 4 years in VLSI Design, Physical Synthesis, STA, formal verification. Master of Technology - MTech focused in communication engineering from Indian Institute of Technology, Roorkee. Bachelor of Technology - BTech focused in Electronics and communication Engineering from G.B. Pant University of Agriculture & Technology, Pantnagar. Interested to work in logic synthesis & implementation, Physical design.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in Physical Design and Timing Analysis.
Location: Champawat, Uttarakhand, India
Experience: 5 yrs 11 mos
Skills
- Physical Design
- Static Timing Analysis
- Digital Electronics
Career Highlights
- 4 years of experience in VLSI Design.
- Expertise in Physical Synthesis and STA.
- Strong background in Communication Engineering.
Work Experience
AMD
Senior Silicon Design Engineer (1 yr 6 mos)
Qualcomm
GPU Senior Implementation Engineer (4 yrs 5 mos)
Education
Master of Technology - MTech at Indian Institute of Technology, Roorkee
Bachelor of Technology - BTech at G. B. Pant University Of Agriculture & Technology
at Jawahar Navodaya Vidyalaya - JNV
