Pawamana Ramachandra — Director of Engineering
Stackforce AI infers this person is a semiconductor design and verification expert with extensive leadership experience.
Location: Bengaluru, Karnataka, India
Experience: 31 yrs 3 mos
Career Highlights
- Over 25 years of experience in semiconductor design and verification.
- Proven leadership in managing hardware and verification teams.
- Expertise in ASIC and FPGA design methodologies.
Work Experience
Microsoft
Principal DV Manager (2 yrs 10 mos)
Intel Corporation
Pre silicon verification engineer (3 yrs 8 mos)
Cerium Systems
Distinguished Engineer (2 yrs 7 mos)
MaxLinear
Director (5 mos)
Cisco Systems
Manager Hardware (4 yrs 2 mos)
Cortina Systems
Director (1 yr 4 mos)
Manager (4 yrs 8 mos)
Technical Lead (1 yr 4 mos)
Cisco Systems
Hardware Engineer (5 yrs 11 mos)
Sun Microsystems
Design Engineer (1 yr 9 mos)
Interra Inc
Design Engineer (9 mos)
National Semiconductor
Design Engineer (10 mos)
Texas Instruments
Software Engineer (1 yr)
Education
Masters at Indian Institute of Science (IISc)
Bachelors at B. M. S. College of Engineering
Bachelor at Bangalore University
at Good Shepherd School
at Vijaya College, RV Road, Bangalore-4
