Poovarasan MU — Software Engineer
● Worked on TSMC 16nm, 22nm, 28nm, 65nm, 150nm node Technology. ● Worked on Synthesis, Physical Design implementation, Static Timing Analysis, Physical Verification and IR Drop at Block level. ● Worked with NXP Semiconductors on 16nm IMX95 project as STA Engineer. ● Worked with MaXentric on 28nm project as PD Engineer. ● Worked with FermionIC on 150nm project as PV Engineer. Worked with ixana.ai on 65nm project from RTL to signoff. EDA TOOLS: GENUS, Design Compiler, INNOVUS, ICC2, Tempus, Prime Time, PVS, Calibre, Calibre PERC, LEC and Voltus.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Timing Analysis.
Location: Bengaluru, Karnataka, India
Experience: 4 yrs 7 mos
Skills
- Physical Design
- Static Timing Analysis
- Physical Verification
- Synthesis
Career Highlights
- Expert in Physical Design and Static Timing Analysis.
- Experience with multiple technology nodes from 16nm to 150nm.
- Proven track record in leading semiconductor projects.
Work Experience
KeenHeads
ASIC Design Engineer (4 yrs 7 mos)
Education
Bachelor of Engineering - BE at Anna University Chennai
