Prajjaval soni

Software Engineer

Bengaluru, Karnataka, India3 yrs 5 mos experience
Highly Stable

Key Highlights

  • Expertise in SystemVerilog and UVM.
  • Significant advancements in Display Port IP Verification.
  • Proactive in identifying and debugging critical bugs.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in SystemVerilog and UVM.

Contact

soni.prajjaval@gmail.comLinkedIn

Skills

Core Skills

SystemverilogUvmDesign Verification

Other Skills

Test PlanningCode CoveragePattern RecognitionLogic GatesDigital LogicPerformance VerificationDebuggingUVM RALAPBApplication-Specific Integrated Circuits (ASIC)System on a Chip (SoC)Hardware Description LanguageDisplay portUniversal Verification Methodology (UVM)Cube MX

About

Achieved significant advancements in Display Port IP Verification at MediaTek Bangalore, demonstrating expertise in SystemVerilog and UVM, alongside team. Developed comprehensive verification plans, enhancing functionality and reliability, while proactively identifying and debugging critical bugs along with coverage closure and RAL.

Experience

3 yrs 5 mos
Total Experience
3 yrs 1 mo
Average Tenure
4 mos
Current Experience

Qualcomm

Senior Engineer

Feb 2026 – Present · 4 mos · Bengaluru, Karnataka, India · On-site

Test PlanningCode CoveragePattern RecognitionLogic GatesDigital LogicPerformance Verification+19

Mediatek

2 roles

Senior Engineer

Jul 2023 – Feb 2026 · 2 yrs 7 mos · Bengaluru, Karnataka, India · On-site

Pattern RecognitionDesign Verification

Intern

Jan 2023 – Jul 2023 · 6 mos · Bengaluru, Karnataka, India · On-site

Display portSystemVerilog

Education

Birla Institute of Technology and Science, Pilani - Goa Campus

Master of Engineering - ME — Embedded systems

Sep 2021 – Jul 2023

Institute of Engineering & Technology DAVV, Indore

Bachelor of Engineering - BE — Electronics and communication engineering

Aug 2016 – Sep 2020

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