Pramod Gopinath

Software Engineer

Bengaluru, Karnataka, India7 yrs 10 mos experience

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Key Highlights

Top-ranked graduate from IIT Delhi with a 9.86 GPA.
Expertise in Analog Circuit Design for High Speed SERDES.
Hands-on experience with advanced semiconductor process nodes.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Analog/RF IC design.

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Skills

Core Skills

Analog Circuit DesignData Analysis

Other Skills

Cadence VirtuosoPerlPython (Programming Language)TeamworkCC++Microcontrollers3D ModelingCircuit DesignField-Programmable Gate Arrays (FPGA)ElectronicsMicrosoft OfficeMatlabArduinoC (Programming Language)

About

Hi there! Thanks for stopping by! I am currently working as an Analog/RF IC Engineer with Mediatek. I have completed my Masters from IIT Delhi with focus on Radio Frequency Design and Technology wherein I underwent courses pertaining to Analog and RF IC Design which involved a fair amount of hands-on exposure. My masters thesis involved the design of an Ultra Low Power Bandgap Reference in CMOS Technology. Armed with a bachelor's degree focused on Electrical and Electronics Engineering from National Institute of Technology, Trichy, I have been fortunate to have the experience of working at an industrial level in analog design and analog validation. Additionally I also have a year of experience of working in the banking sector. Currently I'm looking forward to work on various facets of electronic design and am willing to collaborate with like minded individuals.

Experience

7 yrs 10 mos

Total Experience

1 yr 5 mos

Average Tenure

2 yrs 11 mos

Current Experience

Mediatek

Senior Engineer

Jul 2023 – Present · 2 yrs 11 mos · Bengaluru · On-site

I am currently working as a Senior Analog Design Engineer at Mediatek Bangalore, with the High Speed Serial Links Team.
Experience in Designing Analog Circuits for High Speed SERDES (12 Gbps, 24 Gbps)
Experience in designing critical receiver blocks such as DFE, Samplers, DAC's.
Experience in designing Transmitter Datapath Blocks such as Serializer and Driver for a 24 Gbps Link.
Experience in designing bias blocks such as BGR and LDO.
Experience of working in TSMC 12nm, 4nm, 3nm and Intel 16nm process nodes.

Analog Circuit DesignCadence Virtuoso

Intel corporation

Performance Validation Intern

May 2022 – Jul 2022 · 2 mos · Bengaluru, Karnataka, India

Was an intern in the big core Validation team at Intel, Bangalore
Projects:
1. Optimization of Traces for coverage of Performance Monitoring Events.
2. Automation of Event Generation Report
3. Identification of bottlenecks at the top two levels for a given benchmark.
Received Pre-Placement Offer from Intel.

PerlPython (Programming Language)

Office of career services, iit delhi

Nucleus Coordinator

Apr 2022 – Apr 2023 · 1 yr · Delhi, India

I was the department placement coordinator for the Centre for Applied Research in Electronics (CARE), IIT Delhi.

Indian institute of technology, delhi

Graduate Student

Aug 2021 – Jun 2023 · 1 yr 10 mos · New Delhi, Delhi, India

Citi

2 roles

Technology Analyst - C10

Jul 2021 – Jul 2021 · 0 mo

Technology Analyst - C09

Aug 2020 – Jun 2021 · 10 mos

National institute of technology, tiruchirappalli

2 roles

Bachelor Thesis

Nov 2019 – Jun 2020 · 7 mos

My aim was to find highly optimized machine learning algorithms to detect faults in a PV system. It was highly anticipated that adaptation of machine learning algorithms will prove to be an effective cost cutting strategy by minimizing the extent of damage to the system at the time of fault.

Placement Coordinator

May 2019 – Aug 2020 · 1 yr 3 mos

As the placement coordinator, I handled the placements for my batch and internship for my juniors wherein I strived to provide the best possible opportunities for them.

Texas instruments

2 roles

Intern

May 2019 – Jul 2019 · 2 mos · Bengaluru, Karnataka, India

Worked with the medical imaging group. Involved with the characterization of a sensor and the verification of ASIC which will be used in various imaging modalities.

Intern

Dec 2018 – Jan 2019 · 1 mo · Bangalore

I worked with the high speed data converters group at Texas Instruments India wherein I performed the scan chain testing on the ADC chip by means of parsing a given file. The ADC is supposed to be used for 4G and 5G communication systems.