Praveen Kumar Tadisetty

Software Engineer

Noida, Uttar Pradesh, India3 yrs 6 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Experienced DFT Engineer with expertise in semiconductor engineering.
Proficient in Automatic Test Pattern Generation and Boundary Scan.
Strong foundation in Verilog and CMOS technologies.

Stackforce AI infers this person is a Semiconductor Engineering specialist with a focus on Design for Test (DFT) methodologies.

Contact

Skills

Core Skills

DftSemiconductor EngineeringVerilogCmos

Other Skills

Automatic Test Pattern Generation (ATPG)Boundary ScanGLSJoint Test Action Group (JTAG)System on a Chip (SoC)Mentor GraphicsUnixMbistConformal LECShell ScriptingPerlBscanMemory TestTcl-TkProgramming Languages

Experience

3 yrs 6 mos

Total Experience

3 yrs 3 mos

Average Tenure

3 yrs 6 mos

Current Experience

Alphawave semi

DFT Engineer

Jun 2023 – Present · 3 yrs · India · Remote

Automatic Test Pattern Generation (ATPG)Boundary ScanGLSJoint Test Action Group (JTAG)System on a Chip (SoC)Semiconductor Engineering+26

Tecquire solutions pvt ltd

DFT Engineer

Dec 2022 – Present · 3 yrs 6 mos · Noida, Uttar Pradesh, India · On-site

Mentor GraphicsDFTSemiconductor Engineering

Insemi technology services pvt. ltd.

Intern Engineer(Focused on DFT and Layout)

May 2022 – Oct 2022 · 5 mos · Bengaluru, Karnataka, India · On-site

VerilogCMOS

Education

KKR&KSR Institute of Technology & Sciences, VINJANAMPADU Village (CC-JR)

Bachelor of Technology - BTech — Electronics and communication engineering

Aug 2018 – May 2022

Bapatla junior college

Intermediate — Mathematics Physics Chemistry

Jul 2016 – Apr 2018

Bapatla public school

Apr 2016 – Present

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