Sep 2019 – Jul 2021 · 1 yr 10 mos · Greater San Diego Area · Hybrid

• SnapDragon CPU Team:
• CPU Design: Extensive experience in the design and optimization of high-core CPUs, ensuring optimal performance and efficiency.
• Floorplan LEF Sizing: Proficient in determining floorplan LEF sizes, strategically placement of core for efficient chip layout
• Power Analysis: Skilled in analyzing power numbers and implementing strategies to minimize power consumption while maintaining performance targets.
• PnR (Place and Route): Proven expertise in developing and implementing PnR recipes to achieve optimal power, meeting design specifications and performance requirements.
• Cross-Functional Collaboration: Effective communicator and collaborator across diverse teams, ensuring alignment of design objectives and successful integration of various design elements. (PV,FE and DFT).

Jun 2019 – Aug 2019 · 2 mos · Hyderabad, Telangana, India

• GSP Processor Expertise: In-depth knowledge and hands-on experience in the design, development, and optimization of Graphics Signal Processors, with a focus on achieving high-performance graphics rendering.
• Flow Methodology Development: Proven ability to design and implement efficient flow methodologies, optimizing design and verification processes for enhanced productivity and quality.
• Project Leadership: Skilled in leading cross-functional teams, fostering collaboration, and driving projects from inception to signoff.

Aug 2010 – Jul 2019 · 8 yrs 11 mos · Hyderabad Area, India

• Dedicated professional with a robust background in semiconductor physical design, specializing in managing the end-to-end flow from Net List to GDS II for Sub-System and block-level floor planning and pin placement, CTS (customizing different clock structures) and budgeting. Adept at utilizing industry-leading tools such as Cadence Suite (Innovus, Tempus, PT), SOC Encounter,ICC2 and IBM Suite (Einstimer, ChipBench, etc.), as well as proficiency in Calibre for rigorous design verification. Proven expertise in scripting (Tcl, Perl, Shell) to enhance automation and efficiency throughout the design process.
• Key Skills:
• Physical Design: Extensive experience in physical design processes, including floor planning, placement, route, clock tree synthesis (CTS), and timing/budgeting.
• Tool Proficiency: Skilled in using industry-standard tools such as Cadence Suite (Innovus, Tempus, PT), SOC Encounter, IBM Suite (Einstimer, ChipBench), and Calibre for precise and efficient design execution.
• Scripting and Methodologies: Proficient in scripting languages (Tcl, Perl, Shell) to automate tasks and enhance design methodologies. Strong debugging skills to troubleshoot and optimize workflows.
• Project Profiling: Successfully generated project-level profiling data using scripts, contributing to comprehensive project understanding. Proficient in organizing and presenting data through xls sheets.
• Customer Collaboration: Adept at collaborating with diverse customers, including notable entities such as IBM, Global Foundry, Cisco, and Juniper, ensuring successful project outcomes tailored to unique specifications.

Jan 2010 – Jul 2010 · 6 mos · Hyderabad, Telangana, India