R

Rohit Patil

Product Engineer

Belagavi, Karnataka, India3 yrs 5 mos experience

Key Highlights

  • Experienced in advanced VLSI design technologies.
  • Proficient in DRC, LVS, and extraction error cleaning.
  • Strong foundation in electrical and electronics engineering.
Stackforce AI infers this person is a VLSI design engineer with expertise in semiconductor technologies.

Contact

LinkedIn

Skills

Core Skills

Vlsi Design

Other Skills

Red Hat Enterprise Linux (RHEL)Cadence VirtuosoShell ScriptingJavaScriptAutoCADC (Programming Language)Python (Programming Language)Leadership

About

*I worked in different technologies like 180nm,130nm,5nm and 3nm Finfet. *As per schematic notes doing floorplan, placement, routing,pin placement and critical nets shielding. *Good knowledge on cleaning the DRC and LVS ,ERC and Extraction errors. *Good knowledge on antenna effect, second order effect,submicron effect double pattering.

Experience

3 yrs 5 mos
Total Experience
2 yrs
Average Tenure
1 yr 5 mos
Current Experience

Synopsys inc

Analog Layout Design Sr Engineer

Jan 2025 – Present · 1 yr 5 mos · Bengaluru, Karnataka, India · Hybrid

Arf design

Analog Layout Engineer

Jan 2023 – Jan 2025 · 2 yrs · Karnataka, India · On-site

Eklakshya innovation labs

VLSI design

Sep 2022 – Dec 2022 · 3 mos · Hubli, Karnataka, India

  • Taking introduction to VLSI training in eklakshya innovation labs, Hubbali
Red Hat Enterprise Linux (RHEL)Cadence VirtuosoVLSI Design

Cognizant

Program analyst trainee

Mar 2022 – Jun 2022 · 3 mos · Karnataka, India

  • Successfully completed Internship in cognizant as Program analyst trainee

Education

Gogte Institute of Technology

Bachelor of Engineering - BE — Electrical and Electronics Engineering

Jan 2019 – Jan 2022

Visvesvaraya Technological University

Bachelor of Engineering - BE — Electrical and Electronics Engineering

Aug 2019 – Jul 2022

Raibag polytechnic raibag

Diploma of Education — Electrical and Electronics Engineering

Jul 2016 – Jul 2019

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