Saurabh Poswal

Software Engineer

Noida, Uttar Pradesh, India7 yrs 3 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Lead Software Engineer with expertise in verification domain.
  • Proficient in UVM and Verilog for advanced verification tasks.
  • Strong background in various communication protocols.
Stackforce AI infers this person is a Verification Engineer specializing in hardware design and verification methodologies.

Contact

LinkedIn

Skills

Core Skills

Universal Verification Methodology (uvm)Verilog

Other Skills

system verilogAMBA AHBAPBI2CAXI

About

working in verification domain

Experience

7 yrs 3 mos
Total Experience
3 yrs 7 mos
Average Tenure
5 yrs 2 mos
Current Experience

Cadence design systems

Lead Software Engineer

Apr 2021 – Present · 5 yrs 2 mos · Noida, Uttar Pradesh, India

Verilogsystem verilogUniversal Verification Methodology (UVM)AMBA AHBAPBI2C+1

Agnisys inc

Verification Engineer

Jan 2019 – Feb 2021 · 2 yrs 1 mo · Noida Area, India

Education

AKTU

BTech - Bachelor of Technology — Electronics and instrumentation

Jan 2011 – Jan 2015

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