Shivam Agarwal

Software Engineer

Jaipur, Rajasthan, India5 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in RTL verification and embedded systems.
  • Proficient in FPGA design and firmware development.
  • Strong academic background from IIT BHU.
Stackforce AI infers this person is a skilled engineer in embedded systems and FPGA design.

Contact

LinkedIn

Skills

Core Skills

Rtl VerificationEmbedded SystemsDft

Other Skills

PerlTopgunVerdiJoint Test Action Group (JTAG)Field-Programmable Gate Arrays (FPGA)Computer ArchitectureData StructuresAlgorithmsImage ProcessingMicrocontrollersXilinx VivadoFirmwareVHDLVerilogC++

Experience

5 yrs
Total Experience
2 yrs 6 mos
Average Tenure
4 yrs 1 mo
Current Experience

Nvidia

2 roles

Senior DFT Engineer

Promoted

Mar 2025 – Present · 1 yr 3 mos · Bengaluru, Karnataka, India · Hybrid

PerlTopgunVerdiJoint Test Action Group (JTAG)RTL VerificationEmbedded Systems+18

DFT Engineer

May 2022 – Mar 2025 · 2 yrs 10 mos · Bengaluru, Karnataka, India · Hybrid

  • RTL Engineer
VerdiJoint Test Action Group (JTAG)RTL Verification

Qualcomm

Associate Engineer

Jun 2021 – May 2022 · 11 mos · Hyderabad, Telangana, India

  • RFSW Engineer

Ab circuits and research labs (abcrl)

Firmware Intern

Mar 2021 – May 2021 · 2 mos · Bengaluru, Karnataka, India

  • Configuring the Artix7-35T FPGA into the Shakti Microprocessor ecosystem and writing the firmware for Shakti Microcontroller using PIO in VScode.

Texas instruments

DFT Intern

May 2020 – Jul 2020 · 2 mos · Bengaluru, Karnataka, India

  • Scan Time Reduction Using DDR Memory on FPGA.

Education

Indian Institute of Technology (Banaras Hindu University), Varanasi

Bachelor of Technology - BTech — Electronics and communication engineering

Jan 2017 – Jan 2021

SJ Public School

Jan 2000 – Jan 2016

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