S

Shivaram Reddy Kanukula

Software Engineer

Hyderabad, Telangana, India3 yrs 7 mos experience
Most Likely To Switch

Key Highlights

  • Experienced in ASIC Digital Design and Verification.
  • Proficient in UVM and SystemVerilog methodologies.
  • Strong background with leading tech companies like Intel and Synopsys.
Stackforce AI infers this person is a Digital Design Engineer with expertise in ASIC and verification methodologies.

Contact

LinkedIn

Skills

Core Skills

Universal Verification Methodology (uvm)Systemverilog

Other Skills

Perlverilog

Experience

3 yrs 7 mos
Total Experience
1 yr 9 mos
Average Tenure
1 yr 10 mos
Current Experience

Synopsys inc

ASIC Digital Design Sr Engineer

Aug 2024 – Present · 1 yr 10 mos · Bengaluru, Karnataka, India · On-site

PerlUniversal Verification Methodology (UVM)SystemVerilogverilog

Intel corporation

2 roles

SoC Design Verification Engineer

Jun 2022 – Mar 2024 · 1 yr 9 mos

Pre-silicon verif/valid Intern at Intel corporation

Jul 2021 – May 2022 · 10 mos

Education

Dr B R Ambedkar National Institute of Technology, Jalandhar

M.tech — vlsi

Jan 2020 – Jan 2022

Nalla Malla Reddy Engineering College

Bachelor of Technology - BTech — ECE

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