Shubham Kumar Dhiman

Software Engineer

Bengaluru, Karnataka, India5 yrs 11 mos experience
Highly StableAI Enabled

Key Highlights

  • Expert in RTL design for high-speed IPs
  • Experience in ASIC design for AI workloads
  • Proficient in wireless communication technology
Stackforce AI infers this person is a skilled ASIC Design Engineer specializing in high-speed IPs and wireless communications.

Contact

LinkedIn

Skills

Core Skills

Asic DesignRtl DesignWireless Communications

Other Skills

AI workloadchip designhigh speed IPsverification supportSOC level connectivityformal verificationunit level synthesis5G modemIP developmentMIPS processor developmentMicrosoft OfficeCustomer ServiceLeadershipMicrosoft WordMicrosoft PowerPoint

About

Embedded C, C, Java, Worked on microcontrollers like Atmega 16 and Dsp Processors, Verilog Hdl, System verilog, Matlab Image Processing, synopsis Dc compiler

Experience

5 yrs 11 mos
Total Experience
2 yrs 4 mos
Average Tenure
1 yr 2 mos
Current Experience

Meta

ASIC Design Engineer

Apr 2025 – Present · 1 yr 2 mos · Bengaluru, Karnataka, India · Hybrid

  • Started Working in Meta as RTL design Engineer in infrastructure team building chips for AI workload
RTL designAI workloadchip designASIC DesignRTL Design

Nvidia

ASIC Design Engineer

Jan 2022 – Apr 2025 · 3 yrs 3 mos · Bangalore Urban, Karnataka, India

  • Working on RTL design of high speed IPs such as MPHY (DIigital PHY ) for universal flash storage controller (UFSHC) , PCS for Ethernet
  • (25G/10G/5G/2.5G/1G) and Verification support for above IPs
  • SOC level connectivity for the above IPs
  • RTL CDC, Formal verification, Unit level synthesis for the same
RTL designhigh speed IPsverification supportSOC level connectivityformal verificationunit level synthesis+2

Mediatek

2 roles

Senior Engineer

Promoted

Jul 2020 – Jan 2022 · 1 yr 6 mos

  • RTL Design Engineer working on wireless communications technology design of 5G modem, AHB, APB, AXI IP development, and MIPS processor development.
RTL design5G modemIP developmentMIPS processor developmentASIC DesignWireless Communications

Design Engineer

Jul 2019 – Jul 2020 · 1 yr

Education

Motilal Nehru National Institute Of Technology

Master of Technology - MTech — Signal processing

Jan 2018 – Jan 2020

BUNDELKHAND INSTITUTE OF ENGINEERING AND TECHNOLOGY, JHANSI

Bachelor of Technology (B.Tech.)

Jan 2013 – Jan 2017

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