Vasantharoy Annamreddy — Software Engineer
Physical Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verilog,Synthesis,Physical Design Flow,STA and Sign-Off .Strong engineering professional with a Master's Degree in VLSI Design from VIT University,Chennai.Worked in Backend Physical Design Engineer with a very good hand in scripting using various tool languages including Cadence Genus, LEC(Logic Equivalence Check),Implementation tools: Cadence Innovus,Synopsis ICC. In my leisure time i am a playing cricket and traveller at heart.
Stackforce AI infers this person is a Physical Design Engineer in the semiconductor industry.
Location: Noida, Uttar Pradesh, India
Experience: 13 yrs 10 mos
Skills
- Physical Design
- Static Timing Analysis
Career Highlights
- Expertise in Physical Design and Static Timing Analysis.
- Strong background in VLSI Design with a Master's degree.
- Proficient in various EDA tools and scripting languages.
Work Experience
KeenHeads
Physical Design Engineer (6 yrs 4 mos)
Incise Infotech Private Limited
Physical Design Engineer (1 yr 8 mos)
ChipEdge Technologies Pvt Ltd
Physical Design Engineer Trainee (5 mos)
AKRG CET
Assistant Professor (3 yrs 10 mos)
PCEPL
MIS cum Junior Network Admin (1 yr 11 mos)
Education
Physical Design Engineer trainee at Chipedge Technologies at Electronics
M.Tech at Vellore Institute of Technology
B.Tech at GMR Institute Of Technology
