Vasu Verma

Software Engineer

Hyderabad, Telangana, India5 yrs 10 mos experience

Highly StableAI Enabled

Key Highlights

Expert in FPGA Prototyping and customer support.
Mastered formal verification and RTL design at Intel.
Ranked 4th in Master's program with notable research.

Stackforce AI infers this person is a Semiconductor FPGA Development Specialist with expertise in formal verification and prototyping.

Contact

Skills

Core Skills

Fpga PrototypingCustomer SupportFpga DevelopmentFormal Verification

Other Skills

PNRProtoCompilerHAPSVerilogVHDLIntel Quartus PrimeStatic Timing AnalysisOnespin ec360Synplify EliteXilinx VivadoRegression TestingRegression AnalysisHardware ValidationMemory validationQuartus flow

About

At Synopsys, working with dedication to enable customer success with the HAPS platform. My core mission? Delivering expert support in FPGA Prototyping with ProtoCompiler including HAPs-100 and HAPs-200 platforms, helping customers with partitioning designs in FPGAs, STA and PnR debug and collaborating with exceptional and cross-functional teams to drive peak performance in HAPS hardware and software. Before diving deep into Synopsys's cutting-edge work, I spent 4 years at Intel as a Software Validation Engineer, where I sharpened my skills in VHDL and Verilog HDL, mastering FPGA design flow automation, testing, and formal verification. My academic background includes a Master's degree in Embedded Systems from VIT (ranked 4th) and a notable research award for my work on CNN-based Audio Sampling using Xilinx's Zynq FPGA. I'm not just a strong technical mind; I'm a driven, fast-paced learner with a passion for innovation. I thrive on the challenges and opportunities within the semiconductor domain, constantly seeking to expand my knowledge and apply new technologies. I'm a hardworking, collaborative team player who values quality and is always ready to tackle the next big problem in FPGA development.

Experience

5 yrs 10 mos

Total Experience

4 yrs

Average Tenure

1 yr 10 mos

Current Experience

Synopsys inc

Staff Engineer

Aug 2024 – Present · 1 yr 10 mos · Hyderabad · On-site

PNRProtoCompilerHAPSFPGA PrototypingCustomer Support

Intel corporation

2 roles

FPGA Development Tools Engineer

Jun 2021 – Aug 2024 · 3 yrs 2 mos

1. Demonstrated mastery in RTL Logic Design, Functional Simulation, and Formal Verification using Quartus Prime Pro.
2. Expertise in Intel Quartus Prime compilation flow, navigating through elaboration to fitter stages for Agilex, Stratix 10, and internal devices.
3. Utilized Onespin ec360 for rigorous formal verification within the Quartus Prime workflow.
4. Deep understanding of Intel FPGA memory architectures, particularly M20Ks and MLABs.
5. Applied Static Timing Analysis to troubleshoot and resolve timing challenges in customer designs.
6. Commanded architectural enhancements and validated memories within the Quartus environment.
7. Proficiently utilized Intel Quartus Prime, Xilinx Vivado, Synplify Compiler, Onespin 360 FV, and simulation tools like VCS, Modelsim, and Xcelium.
8. Spearheaded flawless Testplan creation for robust validation of Quartus Prime Pro features.
9. Crafted testcases in Verilog, SystemVerilog, and VHDL, automating regression runs with PERL/TCL scripts.
10. Leveraged debugging expertise to gain insights into customer designs.

VerilogVHDLIntel Quartus PrimeStatic Timing AnalysisOnespin ec360Formal Verification+1

Graduate Technical Intern

Aug 2020 – Jun 2021 · 10 mos

1. Mastered Onespin EC 360, employing it for rigorous formal verification.
2. Engineered comprehensive testplans and testcases to validate Quartus Prime Pro's synthesis features.
3. Conducted thorough comparisons of new features with competitors like Xilinx Vivado and Synopsys Synplify.