Vijay B

Product Engineer

India8 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in SystemVerilog for design engineering.
  • Proven track record in silicon design roles.
  • Strong background in verification engineering.
Stackforce AI infers this person is a semiconductor design engineer with expertise in verification and silicon design.

Contact

LinkedIn

Skills

Core Skills

Systemverilog

Experience

8 yrs 7 mos
Total Experience
2 yrs 1 mo
Average Tenure
3 yrs 11 mos
Current Experience

Amd

2 roles

Senior Design Engineer

Promoted

Jun 2024 – Present · 2 yrs · Hyderabad, Telangana, India

SystemVerilog

Silicon Design Engineer 2

Jul 2022 – Jun 2024 · 1 yr 11 mos · Hyderabad, Telangana, India

Sevitech

Senior Engineer

Mar 2021 – Jun 2022 · 1 yr 3 mos · Bengaluru, Karnataka, India · On-site

Test and verification solutions

Verification Engineer

Apr 2018 – Feb 2021 · 2 yrs 10 mos · Bengaluru, Karnataka, India · On-site

Adept chips services pvt ltd

Verification Engineer

Aug 2017 – Mar 2018 · 7 mos · Bengaluru, Karnataka, India

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