Yeswanth Harinivas Raghupathruni

Software Engineer

Bengaluru, Karnataka, India7 yrs 7 mos experience
Highly Stable

Key Highlights

  • Expert in DFT methodologies for AI XPUs.
  • Strong background in digital logic design.
  • Proficient in ATPG simulations and validation.
Stackforce AI infers this person is a DFT specialist in the semiconductor industry.

Contact

LinkedIn

Skills

Core Skills

DftDigital Logic

Other Skills

ATPG SIMULATIONSATEScan insertionAtpgProblem SolvingTest CasesOral CommunicationCoverage AnalysisTest PlanningPLL bring upTDR ProgrammingPost Silicon ValidationMbistSimulationsStatic Timing Analysis

About

R&D IC Design Engineer at Broadcom

Experience

7 yrs 7 mos
Total Experience
2 yrs 9 mos
Average Tenure
2 yrs 1 mo
Current Experience

Broadcom

R&D IC Design Engineer (DFT)

May 2024 – Present · 2 yrs 1 mo · Bengaluru, Karnataka, India · On-site

  • Drove the successful integration of DFT methodologies for high-performance AI XPUs.
ATPG SIMULATIONSATEDFTDigital Logic

Amd

2 roles

Sr Silicon Design Engineer (DFT)

Promoted

Jul 2022 – May 2024 · 1 yr 10 mos · Hyderabad, Telangana, India · On-site

Design Engineer 2 (DFT)

Mar 2021 – Jul 2022 · 1 yr 4 mos · Hyderabad, Telangana, India · On-site

Soctronics

Design Engineer 1 (DFT)

Nov 2018 – Mar 2021 · 2 yrs 4 mos · Hyderabad, Telangana, India · On-site

Amd veda iit

Graduate Engineer Trainee (DFT & STA)

May 2018 – Nov 2018 · 6 mos · Hyderabad, Telangana, India · On-site

Education

BITS Pilani Work Integrated Learning Programmes

Master of Technology - MTech — Microelectronics

Dec 2020 – Dec 2022

Aditya Institute of Technology and Management

Bachelor of Technology - BTech

Sep 2014 – Apr 2018

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