monika padmanabh — CEO
At Maven Silicon, leadership and innovation are the cornerstones of my tenure as Vice President of the Alumni Committee. My mission is to harness the collective expertise of our alumni to drive meaningful industry advancements and societal contributions. With a focus on fostering a culture of collaboration, my team and I are dedicated to nurturing a dynamic community where innovation and inspiration flourish. My current role at Intel Corporation as a Senior Design Verification Engineer leverages my proficiency in digital logic and Python, ensuring meticulous design verification that underpins our technological solutions. My commitment to excellence is demonstrated through my instrumental role in achieving significant project milestones, showcasing my dedication to both technical precision and strategic project execution. Internationally acclaimed professional with 14 years of VLSI industry experience in the area of ASIC, SoC and FPGA based Verification. Led Bridge Tek Global Verification team in Vietnam & Singapore on bringing up UVM test bench for CPU core. Knowledge on implementing USB PD into automotive sector according to ASIL (Automotive safety Integrity level) ISO26262 std. Lead verification teams on PCIe Gen3, Gen4, Gen5, Gen6 link layer and LTSSM, USB2.0, USB3.0 IP/Sub-system/SoC projects. Hands on experience on bus protocols like Amba AXI, APB & AHB. Peripherals like UART, SPI, GPIO, I2C
Stackforce AI infers this person is a VLSI and ASIC verification expert with leadership experience in the semiconductor industry.
Location: Bengaluru, Karnataka, India
Experience: 12 yrs
Skills
- Leadership
- Digital Logic
Career Highlights
- 14 years of VLSI industry experience.
- Led verification teams across multiple countries.
- Expertise in digital logic and design verification.
Work Experience
Ericsson
Lead Verification Engineer (5 mos)
Maven Silicon
Vice President of Maven Silicon Alumni Committee (2 yrs 3 mos)
Intel Corporation
Senior Design Verification Engineer (4 yrs 1 mo)
UST
Lead Engineer (2 yrs 4 mos)
FTDI Chip
Senior IC Engineer (6 mos)
Mindlance Technologies
Senior Verification Engineer (2 yrs)
Tech Mahindra
Verification Engineer (1 yr 4 mos)
Maven Silicon
Staff Project Intern (1 yr 4 mos)
Education
Bachelor of Engineering (B.E.) at Visvesvaraya Technological University
Pre-University at The Oxford PU Ind College