Abhinav Rathore — Software Engineer
Highly experienced digital design and hardware systems engineer with 15+ years of industry expertise spanning ASIC and FPGA domains, PCIe Gen4/5/6/7 technologies, DMA engines, SmartNIC architectures, and ultra-low latency systems for financial and cloud infrastructure. Currently focused on the development of next-generation AI connectivity solutions that enable scalable, high-performance interconnects for both scale-up and scale-out architectures in hyperscale data centers. Emphasis is on designing AI-optimized fabrics and protocols to support massive data movement essential for advanced AI workloads. Previously led high-impact programs at Intel, overseeing architecture, RTL design, and validation of PCIe/DMA IPs and SmartNIC platforms, driving innovation and successful delivery of complex hardware systems.
Stackforce AI infers this person is a highly skilled engineer in the semiconductor and telecommunications industries.
Location: Bengaluru, Karnataka, India
Experience: 15 yrs 11 mos
Skills
- Pcie
- Dma
- High-frequency Trading
- Systemverilog
- Fpga
- Asic
- Vlsi
- Digital Design
Career Highlights
- 15+ years in ASIC and FPGA domains.
- Expert in PCIe technologies and SmartNIC architectures.
- Leading development of AI connectivity solutions.
Work Experience
Astera Labs
Principal Engineer (1 yr)
Intel Corporation
Techinical Lead IP Design (3 yrs 1 mo)
IP Logic Design Engineer (2 yrs 7 mos)
APT Portfolio Private Limited
Low Latency HFT Platform Development (1 yr 11 mos)
Qualcomm
FPGA Design Specialist (1 yr 11 mos)
Lattice Semiconductor
System Design Engineer (4 yrs 7 mos)
Delopt
Design Engineer (9 mos)
Education
Postgraduate Degree at Centre for Development of Advanced Computing (C-DAC)
Bachelor of Technology - BTech at Dr. A.P.J. Abdul Kalam Technical University